voice.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401
  1. /**
  2. * @file voice.c
  3. * @author chipsea
  4. * @brief
  5. * @version 0.1
  6. * @date 2020-11-30
  7. * @copyright Copyright (c) 2020, CHIPSEA Co., Ltd.
  8. * @note
  9. */
  10. /*******************************************************************************
  11. * @file voice.c
  12. * @brief Contains all functions support for adc driver
  13. * @version 0.0
  14. * @date 16. Jun. 2018
  15. * @author qing.han
  16. *
  17. .
  18. *
  19. *******************************************************************************/
  20. #include "rom_sym_def.h"
  21. #include "error.h"
  22. #include "cst92f2x.h"
  23. #include "gpio.h"
  24. #include "pwrmgr.h"
  25. #include "clock.h"
  26. #include "adc.h"
  27. #include <string.h>
  28. #include "log.h"
  29. #include "voice.h"
  30. #include "jump_function.h"
  31. static voice_Ctx_t mVoiceCtx;
  32. static uint32_t voice_data[HALF_VOICE_WORD_SIZE];
  33. // Enable voice core
  34. void hal_voice_enable(void)
  35. {
  36. hal_clk_gate_enable(MOD_ADCC);
  37. subWriteReg(0x40050000,0,0,1);
  38. }
  39. // Disable voice core
  40. void hal_voice_disable(void)
  41. {
  42. hal_clk_gate_disable(MOD_ADCC);
  43. subWriteReg(0x40050000,0,0,0);
  44. }
  45. // Select DMIC
  46. void hal_voice_dmic_mode(void)
  47. {
  48. subWriteReg(0x4005000c,0,0,1);
  49. }
  50. // Select AMIC
  51. void hal_voice_amic_mode(void)
  52. {
  53. subWriteReg(0x4005000c,0,0,0);
  54. subWriteReg(0x4000f048,7,5,0); //Connect ADC to PGA
  55. subWriteReg(0x4000f07c,4,4,1);
  56. subWriteReg(0x4000f07c,0,0,1);
  57. subWriteReg(0x4000F000 + 0x7c,2,1,HAL_ADC_CLOCK_320K);
  58. }
  59. // Open a GPIO pin for DMIC
  60. void hal_voice_dmic_open(GpioPin_t dmicDataPin, GpioPin_t dmicClkPin)
  61. {
  62. HalGpioFmuxConfig(dmicDataPin, (Fmux_Type_e)FMUX_ADCC);
  63. HalGpioFmuxConfig(dmicClkPin, (Fmux_Type_e)FMUX_CLK1P28M);
  64. }
  65. // Set PGA gain for AMIC
  66. void hal_voice_amic_gain(uint8_t amicGain)
  67. {
  68. uint8_t pgaGain1;
  69. uint8_t pgaGain2;
  70. if (amicGain > 14)
  71. amicGain = 14;
  72. if (amicGain > 8) {
  73. pgaGain1 = 2;
  74. pgaGain2 = amicGain - 8;
  75. }
  76. else if (amicGain > 4) {
  77. pgaGain1 = 1;
  78. pgaGain2 = amicGain - 4;
  79. }
  80. else {
  81. pgaGain1 = 0;
  82. pgaGain2 = amicGain;
  83. }
  84. subWriteReg(0x4000f048,18,17,(uint32_t)pgaGain1);
  85. subWriteReg(0x4000f048,21,19,(uint32_t)pgaGain2);
  86. }
  87. // Set voice process gain
  88. void hal_voice_gain(uint8_t voiceGain)
  89. {
  90. subWriteReg(0x4005000c,22,16,(uint32_t)voiceGain);
  91. }
  92. // Set voice encoding mode
  93. void hal_voice_encode(VOICE_ENCODE_t voiceEncodeMode)
  94. {
  95. subWriteReg(0x4005000c,13,12,voiceEncodeMode);
  96. }
  97. // Set voice data rate
  98. void hal_voice_rate(VOICE_RATE_t voiceRate)
  99. {
  100. subWriteReg(0x4005000c,9,8,voiceRate);
  101. }
  102. // INTERNAL: Set voice notch filter config
  103. static void set_voice_notch(VOICE_NOTCH_t voiceNotch)
  104. {
  105. subWriteReg(0x4005000c,3,2,voiceNotch);
  106. }
  107. // INTERNAL: Set voice data polarity
  108. static void set_voice_polarity(VOICE_POLARITY_t voicePolarity)
  109. {
  110. subWriteReg(0x4005000c,1,1,voicePolarity);
  111. }
  112. // Enable voice auto-mute
  113. void hal_voice_amute_on(void)
  114. {
  115. subWriteReg(0x40050014,0,0,0);
  116. }
  117. // Disable voice auto-mute
  118. void hal_voice_amute_off(void)
  119. {
  120. subWriteReg(0x40050014,0,0,1);
  121. }
  122. // INTERNAL: Set voice auto-mute configurations
  123. static void set_voice_amute_cfg(
  124. uint16_t amutGainMax,
  125. uint8_t amutGainBwMax,
  126. uint8_t amutGdut,
  127. uint8_t amutGst2,
  128. uint8_t amutGst1,
  129. uint16_t amutLvl2,
  130. uint16_t amutLvl1,
  131. uint8_t amutAlvl,
  132. uint8_t amutBeta,
  133. uint8_t amutWinl)
  134. {
  135. subWriteReg(0x40050010,30,20,(uint32_t)amutGainMax);
  136. subWriteReg(0x40050010,19,16,(uint32_t)amutGainBwMax);
  137. subWriteReg(0x40050010,13,8,(uint32_t)amutGdut);
  138. subWriteReg(0x40050010,7,4,(uint32_t)amutGst2);
  139. subWriteReg(0x40050010,3,0,(uint32_t)amutGst1);
  140. subWriteReg(0x40050014,30,20,(uint32_t)amutLvl2);
  141. subWriteReg(0x40050014,18,8,(uint32_t)amutLvl1);
  142. subWriteReg(0x40050018,15,8,(uint32_t)amutAlvl);
  143. subWriteReg(0x40050018,6,4,(uint32_t)amutBeta);
  144. subWriteReg(0x40050018,3,0,(uint32_t)amutWinl);
  145. }
  146. /**************************************************************************************
  147. * @fn hal_VOICE_IRQHandler
  148. *
  149. * @brief This function process for adc interrupt
  150. *
  151. * input parameters
  152. *
  153. * @param None.
  154. *
  155. * output parameters
  156. *
  157. * @param None.
  158. *
  159. * @return None.
  160. **************************************************************************************/
  161. void __attribute__((used)) HalAdcIRQHandler(void)
  162. {
  163. // uint32_t voice_data[HALF_VOICE_SAMPLE_SIZE];
  164. volatile uint32_t voice_int_status = GET_IRQ_STATUS;
  165. // LOG("Voice interrupt processing\n");
  166. MASK_VOICE_INT;
  167. if (voice_int_status & BIT(8)) {
  168. int n;
  169. for (n = 0; n < HALF_VOICE_WORD_SIZE; n++) {
  170. voice_data[n] = (uint32_t)(read_reg(VOICE_BASE + n * 4));
  171. }
  172. CLEAR_VOICE_HALF_INT;
  173. while (IS_CLAER_VOICE_HALF_INT) {}
  174. // if(mVoiceCtx.enable == FALSE)
  175. // continue;
  176. if (mVoiceCtx.evt_handler) {
  177. voice_Evt_t evt;
  178. evt.type = HAL_VOICE_EVT_DATA;
  179. evt.data = voice_data;
  180. evt.size = HALF_VOICE_WORD_SIZE;
  181. mVoiceCtx.evt_handler(&evt);
  182. // LOG("Voice memory half full interrupt processing completed\n");
  183. }
  184. }
  185. if (voice_int_status & BIT(9)) {
  186. int n;
  187. for (n = 0; n < HALF_VOICE_WORD_SIZE; n++) {
  188. voice_data[n] = (uint32_t)(read_reg(VOICE_MID_BASE + n * 4));
  189. }
  190. CLEAR_VOICE_FULL_INT;
  191. while (IS_CLAER_VOICE_FULL_INT) {}
  192. // if(mVoiceCtx.enable == FALSE)
  193. // continue;
  194. if (mVoiceCtx.evt_handler) {
  195. voice_Evt_t evt;
  196. evt.type = HAL_VOICE_EVT_DATA;
  197. evt.data = voice_data;
  198. evt.size = HALF_VOICE_WORD_SIZE;
  199. mVoiceCtx.evt_handler(&evt);
  200. // LOG("Voice memory full interrupt processing completed\n");
  201. }
  202. }
  203. ENABLE_VOICE_INT;
  204. }
  205. /**************************************************************************************
  206. * @fn hal_voice_init
  207. *
  208. * @brief This function process for adc initial
  209. *
  210. * input parameters
  211. *
  212. * @param ADC_MODE_e mode: adc sample mode select;1:SAM_MANNUAL(mannual mode),0:SAM_AUTO(auto mode)
  213. * ADC_CH_e adc_pin: adc pin select;ADC_CH0~ADC_CH7 and ADC_CH_VOICE
  214. * ADC_SEMODE_e semode: signle-ended mode negative side enable; 1:SINGLE_END(single-ended mode) 0:DIFF(Differentail mode)
  215. * IO_CONTROL_e amplitude: input signal amplitude, 0:BELOW_1V,1:UP_1V
  216. *
  217. * output parameters
  218. *
  219. * @param None.
  220. *
  221. * @return None.
  222. **************************************************************************************/
  223. void hal_voice_init(void) {
  224. hal_pwrmgr_register(MOD_ADCC,NULL,NULL);
  225. hal_pwrmgr_register(MOD_VOC,NULL,NULL);
  226. memset(&mVoiceCtx, 0, sizeof(mVoiceCtx));;
  227. }
  228. int hal_voice_config(voice_Cfg_t cfg, voice_Hdl_t evt_handler)
  229. {
  230. if(mVoiceCtx.enable)
  231. return ERR_BUSY;
  232. if(evt_handler == NULL)
  233. return ERR_INVALID_PARAM;
  234. hal_clk_gate_enable(MOD_ADCC);//enable I2C clk gated
  235. mVoiceCtx.evt_handler = evt_handler; //evt_handler;
  236. if(cfg.voiceSelAmicDmic) {
  237. hal_voice_dmic_mode();
  238. hal_voice_dmic_open(cfg.dmicDataPin, cfg.dmicClkPin);
  239. }
  240. else {
  241. hal_voice_amic_mode();
  242. hal_voice_amic_gain(cfg.amicGain);
  243. HalGpioAnalogConfig(P15,Bit_ENABLE);//config micphone bias
  244. }
  245. hal_voice_gain(cfg.voiceGain);
  246. hal_voice_encode(cfg.voiceEncodeMode);
  247. hal_voice_rate(cfg.voiceRate);
  248. set_voice_notch(VOICE_NOTCH_1);
  249. set_voice_polarity(VOICE_POLARITY_POS);
  250. if(cfg.voiceAutoMuteOnOff) {
  251. hal_voice_amute_off();
  252. }
  253. else {
  254. hal_voice_amute_on();
  255. }
  256. set_voice_amute_cfg(64, 6, 9, 0, 1, 55, 10, 48, 3, 10);
  257. mVoiceCtx.cfg = cfg;
  258. //CLK_1P28M_ENABLE;
  259. AP_PCRM->CLKSEL |= BIT(6);
  260. //ENABLE_XTAL_OUTPUT; //enable xtal 16M output,generate the 32M dll clock
  261. AP_PCRM->CLKHF_CTL0 |= BIT(18);
  262. //ENABLE_DLL; //enable DLL
  263. AP_PCRM->CLKHF_CTL1 |= BIT(7);
  264. //ADC_DBLE_CLOCK_DISABLE; //disable double 32M clock,we are now use 32M clock,should enable bit<13>, diable bit<21>
  265. AP_PCRM->CLKHF_CTL1 &= ~BIT(21);
  266. //ADC_CLOCK_ENABLE; //adc clock enbale,always use clk_32M
  267. AP_PCRM->CLKHF_CTL1 |= BIT(13);
  268. //subWriteReg(0x4000f07c,4,4,1); //set adc mode,1:mannual,0:auto mode
  269. AP_PCRM->ADC_CTL4 |= BIT(4);
  270. //*(volatile unsigned int *) 0x4000f040=0x5014B820;
  271. //*(volatile unsigned int *) 0x4000f044=0x019028b0;
  272. //*(volatile unsigned int *) 0x4000f048=0x0000014b;
  273. // hal_pwrmgr_register(MOD_ADCC,NULL,NULL);
  274. // hal_pwrmgr_register(MOD_VOC,NULL,NULL);
  275. return SUCCESS;
  276. }
  277. int hal_voice_start(void)
  278. {
  279. hal_clk_gate_enable(MOD_ADCC);
  280. mVoiceCtx.enable = TRUE;
  281. hal_pwrmgr_lock(MOD_ADCC);
  282. hal_pwrmgr_lock(MOD_VOC);
  283. if (mVoiceCtx.cfg.voiceSelAmicDmic) {
  284. }
  285. else {
  286. AP_PCRM->ANA_CTL |= BIT(16); //Power on PGA
  287. AP_PCRM->ANA_CTL |= BIT(3); //Power on ADC
  288. AP_PCRM->ANA_CTL |= BIT(0);
  289. AP_PCRM->ANA_CTL |= BIT(23);
  290. }
  291. NVIC_SetPriority((IRQn_Type)ADCC_IRQn, IRQ_PRIO_HAL);//teddy add 20190121
  292. NVIC_EnableIRQ((IRQn_Type)ADCC_IRQn);
  293. //Enable voice core
  294. hal_voice_enable();
  295. JUMP_FUNCTION(V29_IRQ_HANDLER) = (uint32_t)&HalAdcIRQHandler;
  296. //Enable VOICE IRQ
  297. ENABLE_VOICE_INT;
  298. return SUCCESS;
  299. }
  300. int hal_voice_stop(void)
  301. {
  302. MASK_VOICE_INT;
  303. //Disable voice core
  304. hal_voice_disable();
  305. if (mVoiceCtx.cfg.voiceSelAmicDmic) {
  306. }
  307. else {
  308. AP_PCRM->ANA_CTL &= ~BIT(16); //Power off PGA
  309. }
  310. //Enable sleep
  311. hal_pwrmgr_unlock(MOD_VOC);
  312. hal_pwrmgr_unlock(MOD_ADCC);
  313. JUMP_FUNCTION(V29_IRQ_HANDLER) = 0;
  314. mVoiceCtx.enable = FALSE;
  315. return 0;
  316. }
  317. int hal_voice_clear(void)
  318. {
  319. //MASK_VOICE_INT;
  320. MASK_VOICE_INT;
  321. NVIC_DisableIRQ((IRQn_Type)ADCC_IRQn);
  322. if (mVoiceCtx.cfg.voiceSelAmicDmic) {
  323. hal_gpioin_disable(mVoiceCtx.cfg.dmicDataPin);
  324. hal_gpioin_disable(mVoiceCtx.cfg.dmicClkPin);
  325. }
  326. else {
  327. }
  328. //clk_gate_disable(MOD_ADCC);//disable I2C clk gated
  329. memset(&mVoiceCtx, 0, sizeof(mVoiceCtx));
  330. //enableSleep();
  331. hal_pwrmgr_unlock(MOD_VOC);
  332. return 0;
  333. }