/*
 * Copyright 2016, yichip Semiconductor(shenzhen office)
 * All Rights Reserved.
 *
 * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Yichip Semiconductor;
 * the contents of this file may not be disclosed to third parties, copied
 * or duplicated in any form, in whole or in part, without the prior
 * written permission of Yichip Semiconductor.
 */

/** 
  *@file pwm.h
  *@brief PWM support for application.
  */
#ifndef _PWM_H_
#define _PWM_H_
#include <stdio.h>
#include "yc11xx.h"
#include "ycdef.h"

/**
  *@brief PWM register base.
  */
#define PWM_BASE CORE_PWM0_PCNT

#define CORE_PWM_PCNT(x)                	 (CORE_PWM0_PCNT+x*0x5)
#define CORE_PWM_NCNT(x)                	 (CORE_PWM0_NCNT+x*0x5)
#define CORE_PWM_CTRL(x)				           (CORE_PWM0_CTRL+x*0x5) 


/** 
  * @brief pwm clock enable enumeration
  */  
typedef enum 
{
	PWMCLK_ENABLE  = 0,
	PWMCLK_DISABLE  = 0x20
} PWM_ClkSwitchDef;
#define  IS_PWM_ClkSwitchDef(clk_switch)	 (clk_switch == PWMCLK_ENABLE || PWMCLK_DISABLE)

/**
  *@brief PWM channel enumeration.
  */
typedef enum
{
	PWM_CHANNEL_0 = 0,
	PWM_CHANNEL_1,
	PWM_CHANNEL_2,
	PWM_CHANNEL_3,
	PWM_CHANNEL_4,
	PWM_CHANNEL_5,
	PWM_CHANNEL_6,
	PWM_CHANNEL_7
}PWM_ChxTypeDef;
#define  IS_PWM_ChxTypeDef(Channel)		      ((Channel == PWM_CHANNEL_0)||\
																								(Channel == PWM_CHANNEL_1) ||\
																								(Channel == PWM_CHANNEL_2) ||\
																								(Channel == PWM_CHANNEL_3) ||\
																								(Channel == PWM_CHANNEL_4) ||\
																								(Channel == PWM_CHANNEL_5) ||\
																								(Channel == PWM_CHANNEL_6) ||\
																								(Channel == PWM_CHANNEL_7))

/** 
  * @brief PWM CLK DIV enumeration
  */    
typedef enum
{
 PWM_CLK_DIVISION_0 = 0x0,
 PWM_CLK_DIVISION_1	=	0x1,
 PWM_CLK_DIVISION_2	=	0x2,
 PWM_CLK_DIVISION_3 =	0x3,
 PWM_CLK_DIVISION_4	=	0x4,
 PWM_CLK_DIVISION_5	=	0x5,
 PWM_CLK_DIVISION_6	=	0x6,
 PWM_CLK_DIVISION_7	=	0x7
}PWM_ClkdivDef;
#define  IS_CLK_DIVISION(div)		((div == PWM_CLK_DIVISION_0)||\
																								(div == PWM_CLK_DIVISION_1) ||\
																								(div == PWM_CLK_DIVISION_2)	||\
																								(div == PWM_CLK_DIVISION_3) ||\
																								(div == PWM_CLK_DIVISION_4)	||\
																								(div == PWM_CLK_DIVISION_5) ||\
																								(div == PWM_CLK_DIVISION_6)	||\
																								(div == PWM_CLK_DIVISION_7))

/** 
  * @brief PWM start output enumeration
  */  
typedef enum 
{
	OutputLow  = 0,
	OutputHigh = 0x10
} START_TypeDef;
#define IS_PWM_START(LEVEL)		(LEVEL == OutputLow || LEVEL == OutputHigh)
/** 
  * @brief pwm enable enumeration
  */  
typedef enum 
{
	PWM_DISENABLE  = 0,
	PWM_ENABLE  = 0x20
} PWM_SwitchDef;
#define IS_PWM_SWITCH(SWITCH)  (SWITCH == PWM_DISENABLE || SWITCH == PWM_ENABLE)

/** 
  * @brief  PWM CTRL Structure definition  
  */  
typedef struct
{
  PWM_ClkdivDef clk_div; 
	START_TypeDef StartLevel;
  PWM_SwitchDef pwm_switch;
}PWM_CtrlDef;


/** 
  * @brief  PWM Init Structure definition  
  */  
typedef struct
{
  GPIO_NUM pwm_gpio;
  PWM_ChxTypeDef PWM_Channel;
  uint16_t LowLevelPeriod;
  uint16_t HighLevelPeriod;
  PWM_CtrlDef  pwm_ctrl;
}PWM_InitTypeDef;

#define IS_PERIOD_VALUE(x) (x<=0xffff)
#define IS_PWM_GPIO(gpio)    ((gpio >= 0) && (gpio <= 0x1f))




void PWM_ClockSwitch(PWM_ClkSwitchDef PWM_ClkSwitch);

/**
  * @brief set PWM HIGH pulse and low pulse count
  * @param pwm_channel  choose PWM_CHANNEL from  PWM_CHANNEL_0 -  PWM_CHANNEL_7
  * @param pcnt  high pulse count
  * @param ncnt  low pulse count
  */
void PWM_setcnt(PWM_ChxTypeDef pwm_channel,uint16_t pcnt,uint16_t ncnt);

/**
  * @brief set PWM open or close
  * @param pwm_channel  choose PWM_CHANNEL from  PWM_CHANNEL_0 -  PWM_CHANNEL_7
  * @param SWITCH   PWM_ENABLE or PWM_DISENABLE
  */
void PWM_SWITCH(PWM_ChxTypeDef pwm_channel,PWM_SwitchDef SWITCH);
/**
  * @brief PWM config
  * @param gpio  choose the gpio as pwm channel
  * @param pcnt  high  count
  * @param ncnt  low count
  * @param val
  */
void PWM_Init(PWM_InitTypeDef* PWM_InitStruct);

#endif