btreg.h 75 KB

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  1. #ifndef _BT_REG_H_
  2. #define _BT_REG_H_
  3. #define mem_le_adv_transmit 0x0000
  4. #define mem_le_adv_waitcnt 0x0001
  5. #define mem_sbc_error 0x0002
  6. #define mem_le_adv_rcv 0x0002
  7. #define mem_le_req_rcv 0x0003
  8. #define mem_le_scanrsp_rcv 0x0004
  9. #define mem_le_conn_rcv 0x0005
  10. #define mem_inquiryscan_waitcnt 0x0006
  11. #define mem_inquiryscan_rcvcnt 0x0007
  12. #define mem_pagescan_waitcnt 0x0008
  13. #define mem_pagescan_rcvcnt 0x0009
  14. #define mem_pagescan_rcvfhscnt 0x000a
  15. #define mem_slave_rcvcnt 0x000b
  16. #define mem_page_transmit 0x000c
  17. #define mem_page_rcv 0x000d
  18. #define mem_page_rcv_fhs 0x000e
  19. #define mem_master_rcvcnt 0x000f
  20. #define mem_fhs_wait_counter 0x0010
  21. #define mem_newconnto_counter 0x0011
  22. #define mem_inquiry_transmit 0x0012
  23. #define mem_inquiry_rcv 0x0013
  24. #define mem_fw_ver 0x0014
  25. #define mem_current_context 0x0015
  26. #define mem_empty_block 0x0016
  27. #define mem_last_freq 0x0017
  28. #define mem_rssi 0x0018
  29. #define mem_rx_type 0x0019
  30. #define mem_rx_hec_err 0x001a
  31. #define mem_rx_crc_err 0x001c
  32. #define mem_context_ptr 0x001e
  33. #define mem_display 0x0020
  34. #define mem_bcd 0x0028
  35. #define mem_state 0x0030
  36. #define mem_mode 0x0031
  37. #define mem_tsniff 0x0032
  38. #define mem_sniff_anchor 0x0034
  39. #define mem_clk_offset 0x0038
  40. #define mem_rx_window 0x003e
  41. #define mem_plap 0x0040
  42. #define mem_puap 0x0043
  43. #define mem_pnap 0x0044
  44. #define mem_conn_handle 0x0046
  45. #define mem_cur_arq 0x0047
  46. #define mem_lmp_to_send 0x0048
  47. #define mem_lmi_opcode 0x0049
  48. #define mem_lmo_reason 0x004a
  49. #define mem_op 0x004b
  50. #define mem_state_map 0x004c
  51. #define mem_supervision_timer 0x004d
  52. #define mem_supervision_to 0x0051
  53. #define mem_name_offset 0x0053
  54. #define mem_key_size 0x0054
  55. #define mem_reconn_lmp_sm 0x0055
  56. #define mem_aco 0x0056
  57. #define mem_kc 0x0062
  58. #define mem_conn_timer 0x0072
  59. #define mem_sniff_attempt 0x0073
  60. #define mem_sniff_timeout 0x0074
  61. #define mem_dsniff 0x0075
  62. #define mem_amaddr 0x0077
  63. #define mem_lmo_opcode1 0x0078
  64. #define mem_lmi_opcode1 0x0079
  65. #define mem_lmo_reason1 0x007a
  66. #define mem_lmo_tid1 0x007b
  67. #define mem_lmo_opcode2 0x007c
  68. #define mem_lmi_opcode2 0x007d
  69. #define mem_lmo_reason2 0x007e
  70. #define mem_lmo_tid2 0x007f
  71. #define mem_mark_load 0x0080
  72. #define mem_hci_version 0x0088
  73. #define mem_acl_pktlen 0x008b
  74. #define mem_sco_pktlen 0x008d
  75. #define mem_acl_pktcnt 0x008e
  76. #define mem_sco_pktcnt 0x0090
  77. #define mem_current_sniff_attempt 0x0092
  78. #define mem_current_sniff_timeout 0x0093
  79. #define mem_nfreq_index_inq 0x0094
  80. #define mem_nfreq_index_page 0x0095
  81. #define mem_ninqy_index 0x0096
  82. #define mem_fhs_misc 0x0097
  83. #define mem_tx_lch 0x0098
  84. #define mem_tx_len 0x0099
  85. #define mem_subsniff_instant 0x009b
  86. #define mem_subsniff_rate 0x009f
  87. #define mem_subsniff_tcmax 0x00a0
  88. #define mem_subsniff_tsniff 0x00a2
  89. #define mem_lpm_adjust 0x00a3
  90. #define mem_sync_clke 0x00a4
  91. #define mem_lpm_current_mult 0x00aa
  92. #define mem_gpio_wakeup_low 0x00ab
  93. #define mem_gpio_wakeup_high 0x00af
  94. #define mem_npage_index 0x00b3
  95. #define mem_page_mode 0x00b4
  96. #define mem_page_clk 0x00b5
  97. #define mem_tst_pktcnt_sync 0x00b9
  98. #define mem_tst_pktcnt_hec 0x00bb
  99. #define mem_tst_pktcnt_crc 0x00bd
  100. #define mem_tst_pktcnt_dmh 0x00bf
  101. #define mem_tmp_buffer_head 0x00c1
  102. #define mem_tmp_buffer 0x00c4
  103. #define mem_tester_emulate 0x0114
  104. #define mem_temp_payload 0x0115
  105. #define test_mode_scenario 0x0115
  106. #define test_mode_hopping_mode 0x0116
  107. #define test_mode_tx_freq 0x0117
  108. #define test_mode_rx_freq 0x0118
  109. #define test_mode_power_mode 0x0119
  110. #define test_mode_poll_period 0x011a
  111. #define test_mode_packet_type 0x011b
  112. #define test_mode_data_length 0x011c
  113. #define mem_test_mode_old_debug_config 0x011e
  114. #define mem_tester_cnt 0x011f
  115. #define mem_temp_am_addr 0x0120
  116. #define mem_temp_arq 0x0121
  117. #define mem_pdatatemp 0x0122
  118. #define mem_len 0x012a
  119. #define mem_clkn_bt 0x012c
  120. #define mem_clke_bt 0x0130
  121. #define mem_dpll_clkn 0x0134
  122. #define mem_connection_options 0x0138
  123. #define mem_nameres_cnt 0x0139
  124. #define mem_txptr 0x013a
  125. #define mem_slot_offset 0x013c
  126. #define extm_fhs_misc 0x013e
  127. #define extm_newconn_am_addr 0x013f
  128. #define extm_class 0x0140
  129. #define extm_lap 0x0143
  130. #define extm_uap 0x0146
  131. #define extm_nap 0x0147
  132. #define mem_debug_config 0x014a
  133. #define mem_lch_code 0x014b
  134. #define mem_fhs_am_addr 0x014c
  135. #define mem_dpll_error 0x014d
  136. #define mem_bdaddr_list_buff 0x014f
  137. #define mem_select_list_item 0x0173
  138. #define mem_temp_reconn_record 0x0174
  139. #define mem_record_bt_mode 0x0174
  140. #define mem_temp_lap 0x0175
  141. #define mem_list_item_ptr 0x017b
  142. #define mem_eir 0x017d
  143. #define mem_switch_timeout 0x01e1
  144. #define mem_acl_dsniff 0x01e3
  145. #define mem_acl_tsniff 0x01e5
  146. #define mem_acl_attempt 0x01e7
  147. #define mem_acl_timeout 0x01e8
  148. #define mem_avdtp_signal_cmd 0x01e9
  149. #define mem_transaction_label 0x01ea
  150. #define mem_ucode_status 0x01eb
  151. #define mem_otp_ucode_flag 0x01ec
  152. #define mem_qspi_tbuf 0x01ee
  153. #define mem_iicd_tbuf 0x01ef
  154. #define mem_addr_hi 0x01ef
  155. #define mem_eep_addr_hi 0x01f0
  156. #define mem_addr_mi 0x01f0
  157. #define mem_addr_lo 0x01f1
  158. #define mem_iicd_addr 0x01f2
  159. #define mem_spid_rbuf 0x01f3
  160. #define mem_ucode_buf 0x01f7
  161. #define mem_ucode_len 0x01f9
  162. #define mem_sched_addr 0x01fb
  163. #define mem_ucode_ptr 0x01fd
  164. #define mem_ucode_keybuf 0x0200
  165. #define mem_check_plap_temp 0x0210
  166. #define mem_spid_tbuf 0x0222
  167. #define mem_sensor_id 0x0224
  168. #define mem_switch_fail_master_count 0x0225
  169. #define mem_app_evt_timer_count 0x0226
  170. #define mem_h5rx_ackcnt 0x0227
  171. #define mem_check_err_acl_cont 0x0228
  172. #define mem_rp_packets 0x0229
  173. #define mem_packet_type 0x022a
  174. #define mem_hci_sniff_conn_handle 0x022c
  175. #define mem_hci_sniff_max_interval 0x022e
  176. #define mem_hci_sniff_min_interval 0x0230
  177. #define mem_hci_sniff_attempt 0x0232
  178. #define mem_hci_sniff_timeout 0x0234
  179. #define mem_voice_setting 0x0236
  180. #define mem_retransmission_effort 0x0238
  181. #define mem_sco_ptype 0x0239
  182. #define mem_extm_uap_restore 0x023b
  183. #define mem_h5rx_rptr 0x023e
  184. #define mem_h5rx_ack 0x0240
  185. #define mem_h5tx_ack 0x0241
  186. #define mem_h5tx_rptr 0x0242
  187. #define mem_h5tx_wptr 0x0244
  188. #define mem_h5tx_free 0x0246
  189. #define mem_h5rx_tmp 0x0248
  190. #define mem_h5tx_seq 0x0249
  191. #define mem_hci_acl_queue_wptr 0x024a
  192. #define mem_hci_acl_queue_rptr 0x024c
  193. #define mem_hci_acl_queue_end 0x024e
  194. #define mem_hci_acl_queue_wcnt 0x0250
  195. #define mem_hci_acl_cnt 0x0251
  196. #define mem_hci_acl_tx_trigger_wptr 0x0252
  197. #define mem_ucode_id_local 0x0254
  198. #define mem_ucode_id_remote 0x0255
  199. #define mem_check_sum 0x0256
  200. #define mem_ucode_temp 0x0257
  201. #define mem_ucode_temp1 0x0258
  202. #define mem_lock_in_enc 0x0259
  203. #define mem_hci_disconn_reason 0x025a
  204. #define mem_hci_curr_len 0x025b
  205. #define mem_hci_curr_target 0x025c
  206. #define mem_audio_size 0x025e
  207. #define mem_audio_offset 0x0260
  208. #define mem_sco_indata 0x0262
  209. #define mem_sco_outdata 0x029e
  210. #define mem_phone_num_len 0x02da
  211. #define mem_phone_number 0x02db
  212. #define mem_at_command_data 0x02ea
  213. #define mem_sco_flag 0x0308
  214. #define mem_l2cap_mem_start 0x0309
  215. #define mem_l2cap_rxbuff1_len 0x0309
  216. #define mem_l2cap_rxbuff2_len 0x030b
  217. #define mem_l2cap_rxbuff_new 0x030d
  218. #define mem_l2cap_rxbuff_fifo 0x030f
  219. #define mem_l2cap_rxbuff_fifo1 0x030f
  220. #define mem_l2cap_rxbuff_fifo2 0x0310
  221. #define mem_l2cap_payload_ptr 0x0311
  222. #define mem_l2cap_rx_pkt_length 0x0313
  223. #define mem_l2cap_rx_cid 0x0315
  224. #define mem_l2cap_rx_done 0x0317
  225. #define mem_l2cap_signal_ident 0x0318
  226. #define mem_sdp_tx_buff_ptr 0x0319
  227. #define mem_sdp_tx_payload_ptr 0x031b
  228. #define mem_sdp_tx_pkt_length 0x031d
  229. #define mem_tx_malloc_log 0x031f
  230. #define mem_l2cap_temp_ch_info 0x035f
  231. #define mem_l2cap_temp_ch_psm 0x035f
  232. #define mem_l2cap_temp_ch_state 0x0360
  233. #define mem_l2cap_temp_local_cid 0x0361
  234. #define mem_l2cap_temp_remote_cid 0x0363
  235. #define mem_l2cap_mem_end 0x0365
  236. #define mem_le_rxbuf 0x0365
  237. #define mem_le_l2capbuf 0x038d
  238. #define mem_le_mic 0x0465
  239. #define mem_le_peer_mic 0x0469
  240. #define mem_le_skdm 0x046d
  241. #define mem_le_skds 0x0475
  242. #define mem_le_peer_ltk 0x047d
  243. #define mem_le_my_ltk 0x048d
  244. #define mem_le_mrand 0x049d
  245. #define mem_le_state 0x04ad
  246. #define mem_le_mode 0x04ae
  247. #define mem_le_tsniff 0x04af
  248. #define mem_le_anchor 0x04b1
  249. #define mem_le_clk_offset 0x04b5
  250. #define mem_le_receive_window 0x04bb
  251. #define mem_le_plap 0x04bd
  252. #define mem_le_conn_handle 0x04c3
  253. #define mem_le_arq 0x04c4
  254. #define mem_le_ch 0x04c5
  255. #define mem_le_hop 0x04c6
  256. #define mem_le_event_count 0x04c7
  257. #define mem_le_supervision_timer 0x04c9
  258. #define mem_le_instant 0x04cd
  259. #define mem_le_channels 0x04cf
  260. #define mem_le_conn_sm 0x04d0
  261. #define mem_le_op 0x04d1
  262. #define mem_le_access 0x04d2
  263. #define mem_le_crcinit 0x04d6
  264. #define mem_le_window_size 0x04d9
  265. #define mem_le_slave_latency 0x04da
  266. #define mem_le_superto 0x04dc
  267. #define mem_le_channel_map 0x04de
  268. #define mem_le_no_using 0x04e3
  269. #define mem_le_peer_sca 0x04e5
  270. #define mem_le_att_opcode 0x04e6
  271. #define mem_le_att_handle 0x04e7
  272. #define mem_le_err_code 0x04e9
  273. #define mem_le_ll_pairing_fail_reason 0x04ea
  274. #define mem_le_sk 0x04eb
  275. #define mem_le_testtype 0x04fb
  276. #define mem_le_test_sync 0x04fc
  277. #define mem_le_test_pcnt 0x04fe
  278. #define mem_le_notify_len 0x0500
  279. #define mem_cmd_le_create_conn 0x0501
  280. #define mem_le_adv_temp 0x0502
  281. #define mem_le_packet_size 0x0516
  282. #define mem_le_packet_llid 0x0517
  283. #define mem_le_payload_ptr 0x0518
  284. #define mem_lmo_header_length 0x051a
  285. #define mem_lmo_header_opcode 0x051b
  286. #define mem_lmo_payload 0x051c
  287. #define mem_lmi_accepted_opcode 0x052d
  288. #define mem_disconn_reason_send 0x052e
  289. #define mem_tx_fixed_freq 0x052f
  290. #define mem_rx_fixed_freq 0x0530
  291. #define mem_ext_features_page 0x0531
  292. #define mem_lmpext_ssp_enable 0x0532
  293. #define mem_remote_sppcap 0x0534
  294. #define mem_lmp_conn_state 0x0535
  295. #define mem_soft_timer 0x0536
  296. #define mem_pincode_state 0x0538
  297. #define mem_sres_tid 0x0539
  298. #define mem_accptsco_tid 0x053a
  299. #define mem_wait_encryption 0x053b
  300. #define mem_sniff_payload 0x053c
  301. #define mem_aurand_send_delay_time 0x054c
  302. #define mem_prcp_data 0x0550
  303. #define mem_prcp 0x0564
  304. #define mem_prcp_tx_len 0x0565
  305. #define rx_buf_data_ptr 0x0566
  306. #define mem_mod2div_temp 0x0568
  307. #define mem_contw_temp 0x056b
  308. #define mem_rfc_adss 0x056d
  309. #define mem_rfc_current_channel 0x056e
  310. #define mem_rfc_frame_type 0x056f
  311. #define mem_current_fcs 0x0570
  312. #define mem_rfc_paylead_length 0x0571
  313. #define mem_rfc_paylead_ptr 0x0573
  314. #define mem_uih_cmd_type 0x0575
  315. #define mem_uih_length 0x0576
  316. #define mem_rfc_payload_ptr 0x0578
  317. #define mem_ms_param 0x057a
  318. #define mem_pn_credit_flow_type_info 0x057b
  319. #define mem_pn_priority 0x057c
  320. #define mem_pn_acknowledg_timer 0x057d
  321. #define mem_pn_max_retrans 0x057e
  322. #define mem_rfcomm_send_adss 0x057f
  323. #define mem_rfcomm_send_frame_type 0x0580
  324. #define mem_rfcomm_send_fcs 0x0581
  325. #define mem_sdp_mem_start 0x0582
  326. #define mem_sdp_uuid_search_ptr 0x0582
  327. #define mem_sdp_continue_byte 0x058a
  328. #define mem_sdp_pduid 0x058c
  329. #define mem_sdp_transactionid 0x058d
  330. #define mem_sdp_transactionid_local 0x058f
  331. #define mem_sdp_attribute_maxbyte 0x0591
  332. #define mem_sdp_record_maxcnt 0x0593
  333. #define mem_sdp_record_handle 0x0595
  334. #define mem_sdp_LACAP_found 0x0599
  335. #define mem_sdp_RFCOMM_found 0x059a
  336. #define mem_sdp_handle_list 0x059b
  337. #define mem_sdp_attrib_list 0x059b
  338. #define mem_sdp_error_code 0x05bb
  339. #define mem_sdp_all_length 0x05bd
  340. #define mem_handle_humber 0x05bf
  341. #define mem_search_uuid 0x05c0
  342. #define mem_sdp_mem_end 0x05c2
  343. #define mem_rxbuf 0x05c2
  344. #define mem_random_number 0x05d3
  345. #define mem_round_key 0x05e3
  346. #define mem_kinit 0x05f3
  347. #define mem_input_store 0x0603
  348. #define mem_x 0x0613
  349. #define mem_y 0x0623
  350. #define mem_y15 0x0632
  351. #define mem_key_store 0x0633
  352. #define mem_key_store_end 0x0644
  353. #define memp_ar_key 0x0645
  354. #define memp_ar_input 0x0647
  355. #define mem_ar_hround 0x0649
  356. #define mem_ec_infinite 0x0653
  357. #define mem_ec_loopc 0x0654
  358. #define mem_aes_cmac_data_length 0x0656
  359. #define memdat 0x0657
  360. #define mem_ax 0x0657
  361. #define mem_ay 0x066f
  362. #define mem_az 0x0687
  363. #define mem_bx 0x069f
  364. #define mem_ax_256 0x06b7
  365. #define mem_by 0x06b7
  366. #define mem_bz 0x06cf
  367. #define mem_ay_256 0x06d7
  368. #define mem_cx 0x06e7
  369. #define mem_az_256 0x06f7
  370. #define mem_cy 0x06ff
  371. #define mem_cy5 0x0716
  372. #define mem_bx_256 0x0717
  373. #define mem_cz 0x0717
  374. #define mem_k 0x072f
  375. #define mem_by_256 0x0737
  376. #define mem_align 0x0747
  377. #define mem_bz_256 0x0757
  378. #define mem_tmp1 0x0757
  379. #define memahbak 0x0757
  380. #define mem_tmp5 0x076f
  381. #define mem_cx_256 0x0777
  382. #define memahsave 0x0777
  383. #define mem_tmp2 0x0787
  384. #define mem_cy_256 0x0797
  385. #define memahsave_end 0x0797
  386. #define mem_addr_padding 0x0797
  387. #define mem_addr_value 0x0798
  388. #define mem_tmp3 0x079f
  389. #define mem_t1 0x079f
  390. #define mem_addr_value_end 0x07a4
  391. #define mem_addr_iocap_end 0x07a7
  392. #define mem_cy5_256 0x07b6
  393. #define mem_cz_256 0x07b7
  394. #define mem_tmp0 0x07b7
  395. #define mem_t0 0x07b7
  396. #define mem_tmp0a 0x07bf
  397. #define mem_t2 0x07cf
  398. #define mem_k_256 0x07d7
  399. #define mem_t3 0x07e7
  400. #define mem_tmp1_256 0x07f7
  401. #define mem_t7 0x07ff
  402. #define mem_tmp5_256 0x0817
  403. #define mem_tmp2_256 0x0837
  404. #define mem_tmp3_256 0x0857
  405. #define mem_t1_256 0x0857
  406. #define mem_tmp0_256 0x0877
  407. #define mem_t0_256 0x0877
  408. #define mem_t2_256 0x0897
  409. #define mem_t3_256 0x08b7
  410. #define mem_t7_256 0x08d7
  411. #define mem_p 0x08f7
  412. #define mem_a 0x090f
  413. #define mem_b 0x0927
  414. #define mem_gx 0x093f
  415. #define mem_gy 0x0957
  416. #define memh0 0x096f
  417. #define mem_p_256 0x098f
  418. #define mem_a_256 0x09af
  419. #define mem_gx_256 0x09cf
  420. #define mem_gy_256 0x09ef
  421. #define mem_le_slat 0x0a0f
  422. #define mem_sp_state_start 0x0a1f
  423. #define mem_sp_state 0x0a1f
  424. #define mem_master_sp_state 0x0a20
  425. #define mem_sp_flag 0x0a21
  426. #define mem_master_sp_flag 0x0a22
  427. #define mem_sp_calc 0x0a23
  428. #define mem_sp_dh_ready 0x0a24
  429. #define mem_sp_localsm 0x0a25
  430. #define mem_pairing_auth 0x0a26
  431. #define mem_sp_flag_start 0x0a27
  432. #define mem_sp_local_key_send_count 0x0a27
  433. #define mem_sp_remote_key_recv_count 0x0a28
  434. #define mem_sp_remote_key_invalid 0x0a29
  435. #define mem_sp_dhkey_invalid 0x0a2a
  436. #define mem_gkey 0x0a2b
  437. #define mem_le_pubkey_remote_x_256 0x0a2f
  438. #define mem_sp_pubkey_remote 0x0a37
  439. #define mem_sp_pubkey_remote_x 0x0a37
  440. #define mem_sp_pubkey_remote_x_end 0x0a4f
  441. #define mem_sp_pubkey_remote_y 0x0a4f
  442. #define mem_le_pubkey_remote_y_256 0x0a4f
  443. #define mem_le_dhkey_256 0x0a6f
  444. #define mem_sp_dhkey 0x0a77
  445. #define mem_sp_dhkey_end 0x0a8f
  446. #define mem_sp_random_local 0x0a8f
  447. #define mem_sp_random_local_end 0x0a9f
  448. #define mem_sp_random_remote 0x0a9f
  449. #define mem_sp_random_remote_end 0x0aaf
  450. #define memresult 0x0aaf
  451. #define mem_sp_calc_result 0x0aaf
  452. #define memh 0x0aaf
  453. #define memg 0x0ab3
  454. #define memf 0x0ab7
  455. #define meme 0x0abb
  456. #define mem_sp_calc_result_high 0x0abf
  457. #define memd 0x0abf
  458. #define memc 0x0ac3
  459. #define memb 0x0ac7
  460. #define mema 0x0acb
  461. #define mem_sp_check_result 0x0acf
  462. #define mem_sp_confirm_remote 0x0adf
  463. #define mem_sp_prarm_stack 0x0aef
  464. #define mem_ipc_skip_continue_proc 0x0aff
  465. #define mem_ipc_rega_temp 0x0b00
  466. #define mem_hold_contr 0x0b04
  467. #define mem_hold_contw 0x0b06
  468. #define mem_fifo_temp 0x0b08
  469. #define mem_max_bitsneed 0x0b09
  470. #define mem_bits_need00 0x0b0d
  471. #define mem_temp 0x0b0d
  472. #define mem_bits_need01 0x0b11
  473. #define mem_temp1 0x0b11
  474. #define mem_bits_need02 0x0b15
  475. #define mem_timeup 0x0b15
  476. #define mem_bits_need03 0x0b19
  477. #define mem_rega 0x0b19
  478. #define mem_bits_need04 0x0b1d
  479. #define mem_regb 0x0b1d
  480. #define mem_bits_need05 0x0b21
  481. #define mem_regc 0x0b21
  482. #define mem_bits_need06 0x0b25
  483. #define mem_contr 0x0b25
  484. #define mem_contw 0x0b27
  485. #define mem_bits_need07 0x0b29
  486. #define mem_bits_need10 0x0b2d
  487. #define mem_bits_need11 0x0b31
  488. #define mem_bits_need12 0x0b35
  489. #define mem_bits_need13 0x0b39
  490. #define mem_bits_need14 0x0b3d
  491. #define mem_bits_need15 0x0b41
  492. #define mem_bits_need16 0x0b45
  493. #define mem_bits_need17 0x0b49
  494. #define mem_flash_address 0x0b4d
  495. #define mem_flash_data_address 0x0b50
  496. #define mem_flash_trans_length 0x0b52
  497. #define mem_le_data_len_temp 0x0b54
  498. #define mem_tx_fifo_map_temp 0x0b54
  499. #define mem_rpn_dlci 0x0b54
  500. #define mem_event_cmd_response_content 0x0b54
  501. #define mem_le_prand 0x0b54
  502. #define mem_AES_CMAC_k 0x0b54
  503. #define mem_regext_index 0x0b54
  504. #define mem_temp_block0 0x0b54
  505. #define mem_le_data_temp 0x0b55
  506. #define mem_temp_block1 0x0b55
  507. #define mem_le_aes_128 0x0b64
  508. #define mem_regext 0x0b64
  509. #define mem_AES_CMAC_k1 0x0b64
  510. #define mem_temp_block2 0x0b64
  511. #define mem_AES_CMAC_k2 0x0b74
  512. #define mem_temp_block3 0x0b74
  513. #define mem_AES_CMAC_temp 0x0b84
  514. #define mem_temp_block4 0x0b84
  515. #define mem_AES_CMAC_M_last 0x0b94
  516. #define mem_temp_block5 0x0b94
  517. #define mem_le_mackey 0x0ba4
  518. #define mem_temp_block6 0x0ba4
  519. #define mem_aes_state_map 0x0bb4
  520. #define mem_aes_type 0x0bb5
  521. #define mem_tws_sync_clk 0x0bb7
  522. #define mem_tws_connecting_phase 0x0bbb
  523. #define mem_tws_context_offset 0x0bbc
  524. #define mem_patch00 0x4000
  525. #define mem_patch01 0x4001
  526. #define mem_patch02 0x4002
  527. #define mem_patch03 0x4003
  528. #define mem_patch04 0x4004
  529. #define mem_patch05 0x4005
  530. #define mem_patch06 0x4006
  531. #define mem_patch07 0x4007
  532. #define mem_patch08 0x4008
  533. #define mem_patch09 0x4009
  534. #define mem_patch0a 0x400a
  535. #define mem_patch0b 0x400b
  536. #define mem_patch0c 0x400c
  537. #define mem_patch0d 0x400d
  538. #define mem_patch0e 0x400e
  539. #define mem_patch0f 0x400f
  540. #define mem_patch10 0x4010
  541. #define mem_patch11 0x4011
  542. #define mem_patch12 0x4012
  543. #define mem_patch13 0x4013
  544. #define mem_patch14 0x4014
  545. #define mem_patch15 0x4015
  546. #define mem_patch16 0x4016
  547. #define mem_patch17 0x4017
  548. #define mem_patch18 0x4018
  549. #define mem_patch19 0x4019
  550. #define mem_patch1a 0x401a
  551. #define mem_patch1b 0x401b
  552. #define mem_patch1c 0x401c
  553. #define mem_patch1d 0x401d
  554. #define mem_patch1e 0x401e
  555. #define mem_patch1f 0x401f
  556. #define mem_patch20 0x4020
  557. #define mem_patch21 0x4021
  558. #define mem_patch22 0x4022
  559. #define mem_patch23 0x4023
  560. #define mem_patch24 0x4024
  561. #define mem_patch25 0x4025
  562. #define mem_patch26 0x4026
  563. #define mem_patch27 0x4027
  564. #define mem_patch28 0x4028
  565. #define mem_patch29 0x4029
  566. #define mem_patch2a 0x402a
  567. #define mem_patch2b 0x402b
  568. #define mem_patch2c 0x402c
  569. #define mem_patch2d 0x402d
  570. #define mem_patch2e 0x402e
  571. #define mem_patch2f 0x402f
  572. #define mem_patch30 0x4030
  573. #define mem_patch31 0x4031
  574. #define mem_patch32 0x4032
  575. #define mem_patch33 0x4033
  576. #define mem_patch34 0x4034
  577. #define mem_patch35 0x4035
  578. #define mem_patch36 0x4036
  579. #define mem_patch37 0x4037
  580. #define mem_patch38 0x4038
  581. #define mem_patch39 0x4039
  582. #define mem_patch3a 0x403a
  583. #define mem_patch3b 0x403b
  584. #define mem_patch3c 0x403c
  585. #define mem_patch3d 0x403d
  586. #define mem_patch3e 0x403e
  587. #define mem_patch3f 0x403f
  588. #define mem_context 0x4040
  589. #define mem_current_amaddr 0x4130
  590. #define mem_lpm_mode 0x4131
  591. #define mem_device_option 0x4132
  592. #define mem_scan_mode 0x4133
  593. #define mem_last_clkn 0x4134
  594. #define mem_features 0x4138
  595. #define mem_lap 0x4140
  596. #define mem_uap 0x4143
  597. #define mem_nap 0x4144
  598. #define mem_npage 0x4146
  599. #define mem_glap 0x4147
  600. #define mem_class 0x414a
  601. #define mem_iscan_window 0x414d
  602. #define mem_iscan_interval 0x414f
  603. #define mem_pscan_window 0x4151
  604. #define mem_pscan_interval 0x4153
  605. #define mem_page_interval 0x4155
  606. #define mem_page_window 0x4157
  607. #define mem_page_to 0x4159
  608. #define mem_inq_window 0x415b
  609. #define mem_fcomp_mul 0x415d
  610. #define mem_fcomp_div 0x415e
  611. #define mem_rx_window_init 0x415f
  612. #define mem_rx_window_sniff 0x4161
  613. #define mem_rf_init_ptr 0x4163
  614. #define mem_last_type 0x4165
  615. #define mem_retransmission_cnt 0x4166
  616. #define mem_next_btclk 0x4168
  617. #define mem_seqi 0x416c
  618. #define mem_rf_rccal 0x416d
  619. #define mem_handle_num 0x416e
  620. #define mem_max_slot 0x416f
  621. #define mem_eir_enable 0x4170
  622. #define mem_afh_instant 0x4171
  623. #define mem_afh_error_total 0x4175
  624. #define mem_afh_cfg 0x4177
  625. #define mem_afh_new_mod 0x4178
  626. #define mem_afh_map_lo 0x4179
  627. #define mem_afh_map_hi 0x417e
  628. #define mem_afh_used 0x4183
  629. #define mem_afh_index 0x4184
  630. #define mem_afh_map_new 0x4186
  631. #define mem_afh_map 0x4191
  632. #define mem_afh_timer 0x41e1
  633. #define mem_afh_classify_channel_map 0x41e5
  634. #define mem_chip_functions 0x41ef
  635. #define mem_lpm_wake_lock 0x41f1
  636. #define mem_lpm_interval 0x41f3
  637. #define mem_lpm_overhead 0x41f5
  638. #define mem_lpm_hibernate_switch 0x41f6
  639. #define mem_sniff_unint_lost 0x41f7
  640. #define mem_ptt 0x41f8
  641. #define mem_sleep_counter 0x41f9
  642. #define mem_sleep_counter_all 0x41fd
  643. #define mem_sleep_clkn 0x4201
  644. #define mem_sniff_rcv 0x4207
  645. #define mem_sniff_lost 0x420a
  646. #define mem_clks_per_lpo 0x420d
  647. #define mem_lpm_mult 0x4210
  648. #define mem_lpm_mult_timeout 0x4211
  649. #define mem_lpm_mult_cnt 0x4212
  650. #define mem_lpm_config 0x4213
  651. #define mem_lpm_xtalcnt 0x4216
  652. #define mem_lpm_buckcnt 0x4217
  653. #define mem_lpm_ldocnt 0x4218
  654. #define mem_lpm_isogate 0x4219
  655. #define mem_lpm_isogate_final 0x421a
  656. #define mem_saved_gpio 0x421b
  657. #define mem_saved_mark 0x4243
  658. #define mem_saved_spidctrl 0x424b
  659. #define mem_patch_ptr 0x424c
  660. #define mem_patch_len 0x424e
  661. #define mem_timers 0x4250
  662. #define mem_link_key_exists 0x4270
  663. #define mem_link_key_eeprom_head 0x4271
  664. #define mem_link_key 0x4274
  665. #define mem_hci_cmd 0x4284
  666. #define mem_hci_conn_handle 0x4285
  667. #define mem_hci_plap 0x4286
  668. #define mem_hci_puap 0x4289
  669. #define mem_hci_pnap 0x428a
  670. #define mem_uartd_rxitems_got_data 0x428c
  671. #define mem_uartd_rxitems_threshold 0x428d
  672. #define mem_uartd_rx_timeout 0x428e
  673. #define mem_sco_attempt_cout 0x4290
  674. #define mem_tx_power 0x4291
  675. #define mem_avdtp_xmem_start 0x4292
  676. #define mem_avdtpsignal_l2capch_ptr 0x4292
  677. #define mem_avdtpmedia_l2capch_ptr 0x4294
  678. #define mem_audio_allow 0x4296
  679. #define mem_audio_state 0x4297
  680. #define mem_audio_src_endpoint 0x4298
  681. #define mem_audio_src_endpoint_state 0x4299
  682. #define mem_a2dp_reconnct_delay_timer 0x429a
  683. #define mem_avdtp_xmem_end 0x429b
  684. #define mem_avdtp_codec_type 0x429b
  685. #define mem_conf_codec_type 0x42a1
  686. #define mem_conf_channel_mode 0x42a2
  687. #define mem_conf_sample_freq 0x42a3
  688. #define mem_conf_allocation_method 0x42a4
  689. #define mem_conf_subbands 0x42a5
  690. #define mem_conf_blocklen 0x42a6
  691. #define mem_conf_min_poolval 0x42a7
  692. #define mem_conf_max_poolval 0x42a8
  693. #define mem_opend_seid 0x42a9
  694. #define mem_started_seid 0x42aa
  695. #define mem_avc_local_transaction_label 0x42ab
  696. #define mem_audio_vol 0x42ac
  697. #define mem_avdtp_signal 0x42ad
  698. #define mem_avdtp_media 0x42af
  699. #define mem_app_state 0x42b1
  700. #define mem_app_handshake_flag 0x42b2
  701. #define mem_sniff_param_interval 0x42b3
  702. #define mem_sniff_param_attempt 0x42b5
  703. #define mem_sniff_param_timeout 0x42b7
  704. #define mem_cb_check_wakelock 0x42b9
  705. #define mem_cb_before_hibernate 0x42bb
  706. #define mem_cb_before_lpm 0x42bd
  707. #define mem_cb_le_process 0x42bf
  708. #define mem_cb_bt_process 0x42c1
  709. #define mem_cb_idle_process 0x42c3
  710. #define mem_cb_bb_event_process 0x42c5
  711. #define mem_device_nums 0x42c7
  712. #define mem_uart_txpin 0x42c8
  713. #define mem_uart_rxpin 0x42c9
  714. #define mem_uart_rtspin 0x42ca
  715. #define mem_uart_ctspin 0x42cb
  716. #define mem_uartb_txpin 0x42cc
  717. #define mem_uartb_rxpin 0x42cd
  718. #define mem_uartb_rtspin 0x42ce
  719. #define mem_uartb_ctspin 0x42cf
  720. #define mem_spid_sclkpin 0x42d0
  721. #define mem_spid_sdiopin 0x42d1
  722. #define mem_ef_base 0x42d2
  723. #define mem_eeprom_block_size 0x42d5
  724. #define mem_app_connection_options 0x42d7
  725. #define mem_app_disconn_reason 0x42d8
  726. #define mem_app_disconn_reason_flag 0x42da
  727. #define mem_xip_flash_offset 0x42dc
  728. #define mem_xip_option 0x42df
  729. #define mem_xip_flash_read_cmd 0x42e1
  730. #define mem_nv_data_ptr 0x42e2
  731. #define mem_nv_data_number 0x42e4
  732. #define mem_discory_timer 0x42e5
  733. #define mem_avctp_xmem_start 0x42e6
  734. #define mem_avctp_trans_lable 0x42e6
  735. #define mem_avr_state 0x42e7
  736. #define mem_avr_l2capch_ptr 0x42e8
  737. #define mem_avctp_xmem_end 0x42ea
  738. #define mem_cvsd_in_addr_end 0x42ea
  739. #define mem_cvsd_in_addr_ptr 0x42ec
  740. #define mem_cvsd_out_addr_end 0x42ee
  741. #define mem_cvsd_out_addr_ptr 0x42f0
  742. #define mem_baud 0x42f2
  743. #define mem_hci_lt_rx_state 0x42f4
  744. #define mem_hid_xmem_start 0x42f5
  745. #define mem_hid_l2capch_ptr 0x42f5
  746. #define mem_hidint_l2capch_ptr 0x42f7
  747. #define mem_hid_xmem_end 0x42f9
  748. #define mem_xmem_sco_start 0x42f9
  749. #define mem_sco_asso_handle 0x42f9
  750. #define mem_sco_handle 0x42fa
  751. #define mem_sco_dsniff 0x42fc
  752. #define mem_sco_tsniff 0x42fe
  753. #define mem_sco_wsniff 0x4300
  754. #define mem_sco_tx_packet_type 0x4301
  755. #define mem_sco_rx_packet_type 0x4302
  756. #define mem_sco_rx_packet_len 0x4303
  757. #define mem_sco_tx_packet_len 0x4305
  758. #define mem_air_mode 0x4307
  759. #define mem_neogotiation_state 0x4308
  760. #define mem_acl_amaddr 0x4309
  761. #define mem_esco_amaddr 0x430a
  762. #define mem_esco_arq 0x430b
  763. #define mem_acl_arq 0x430c
  764. #define mem_last_type_esco 0x430d
  765. #define mem_last_type_acl 0x430e
  766. #define mem_sco_poll 0x430f
  767. #define mem_esco_attempt 0x4310
  768. #define mem_esco_abnormal_attempt 0x4311
  769. #define mem_xmem_sco_end 0x4312
  770. #define mem_xmem_hf_state_start 0x4312
  771. #define mem_hf_state 0x4312
  772. #define mem_hf_call_state 0x4313
  773. #define mem_hf_command 0x4314
  774. #define mem_agoption 0x4315
  775. #define mem_AG_indicator_map 0x4317
  776. #define mem_AG_indicator 0x431e
  777. #define mem_xmem_hf_state_end 0x4325
  778. #define mem_hf_vlm_speaker 0x4325
  779. #define mem_music_vlm_speaker 0x4326
  780. #define mem_hf_vlm_mic 0x4327
  781. #define mem_at_payload_ptr 0x4328
  782. #define mem_at_command_ptr 0x432a
  783. #define mem_at_rfcomm_data_ptr 0x432c
  784. #define memUI_HF_brsf_feature 0x432e
  785. #define mem_cb_hfp_result_code 0x4330
  786. #define mem_esco_test 0x4332
  787. #define mem_ipc_mcu_phase 0x4333
  788. #define mem_ipc_mcu_state 0x4334
  789. #define mem_ipc_enable 0x4335
  790. #define mem_ipc_le_data_len 0x4336
  791. #define mem_ipc_le_data_att_handle 0x4337
  792. #define mem_ipc_tx_data_len 0x4339
  793. #define mem_ipc_tx_data_ptr 0x433a
  794. #define mem_ipc_loss_packet 0x433c
  795. #define mem_temp_for_addr 0x433e
  796. #define mem_ipc_test_buff 0x4341
  797. #define mem_l2cap_xmem_start 0x434b
  798. #define mem_l2cap_tx_multi_offset 0x434b
  799. #define mem_l2cap_pending_info 0x434d
  800. #define mem_l2cap_pending_id0 0x434d
  801. #define mem_l2cap_pending_delay_time0 0x434e
  802. #define mem_l2cap_pending_ptr0 0x4352
  803. #define mem_l2cap_pending_id1 0x4354
  804. #define mem_l2cap_pending_delay_time1 0x4355
  805. #define mem_l2cap_pending_ptr1 0x4359
  806. #define mem_l2cap_pending_id2 0x435b
  807. #define mem_l2cap_pending_delay_time2 0x435c
  808. #define mem_l2cap_pending_ptr2 0x4360
  809. #define mem_l2cap_pending_count 0x4362
  810. #define mem_l2cap_active_ch_count 0x4363
  811. #define mem_l2cap_ch_info 0x4364
  812. #define mem_l2cap_ch_psm0 0x4364
  813. #define mem_l2cap_ch_state0 0x4365
  814. #define mem_l2cap_local_cid0 0x4366
  815. #define mem_l2cap_remote_cid0 0x4368
  816. #define mem_l2cap_ch_psm1 0x436a
  817. #define mem_l2cap_ch_state1 0x436b
  818. #define mem_l2cap_local_cid1 0x436c
  819. #define mem_l2cap_remote_cid1 0x436e
  820. #define mem_l2cap_ch_psm2 0x4370
  821. #define mem_l2cap_ch_state2 0x4371
  822. #define mem_l2cap_local_cid2 0x4372
  823. #define mem_l2cap_remote_cid2 0x4374
  824. #define mem_l2cap_ch_psm3 0x4376
  825. #define mem_l2cap_ch_state3 0x4377
  826. #define mem_l2cap_local_cid3 0x4378
  827. #define mem_l2cap_remote_cid3 0x437a
  828. #define mem_l2cap_ch_psm4 0x437c
  829. #define mem_l2cap_ch_state4 0x437d
  830. #define mem_l2cap_local_cid4 0x437e
  831. #define mem_l2cap_remote_cid4 0x4380
  832. #define mem_l2cap_ch_psm5 0x4382
  833. #define mem_l2cap_ch_state5 0x4383
  834. #define mem_l2cap_local_cid5 0x4384
  835. #define mem_l2cap_remote_cid5 0x4386
  836. #define mem_l2cap_ch_psm6 0x4388
  837. #define mem_l2cap_ch_state6 0x4389
  838. #define mem_l2cap_local_cid6 0x438a
  839. #define mem_l2cap_remote_cid6 0x438c
  840. #define mem_l2cap_ch_psm7 0x438e
  841. #define mem_l2cap_ch_state7 0x438f
  842. #define mem_l2cap_local_cid7 0x4390
  843. #define mem_l2cap_remote_cid7 0x4392
  844. #define mem_l2cap_prepare_confreq_count 0x4394
  845. #define mem_l2cap_channel_disconnect_timer 0x4395
  846. #define mem_sdp_state 0x4396
  847. #define mem_ML2CAP_comm_id 0x4397
  848. #define mem_used_map 0x4398
  849. #define mem_tx_fifo0 0x4399
  850. #define mem_tx_fifo0_map 0x4399
  851. #define mem_tx_fifo0_ptr 0x439a
  852. #define mem_tx_fifo1 0x439c
  853. #define mem_tx_fifo1_map 0x439c
  854. #define mem_tx_fifo1_ptr 0x439d
  855. #define mem_tx_fifo2 0x439f
  856. #define mem_tx_fifo2_map 0x439f
  857. #define mem_tx_fifo2_ptr 0x43a0
  858. #define mem_tx_fifo3 0x43a2
  859. #define mem_tx_fifo3_map 0x43a2
  860. #define mem_tx_fifo3_ptr 0x43a3
  861. #define mem_tx_fifo_end 0x43a5
  862. #define mem_l2cap_flow_ctrl_flag 0x43a5
  863. #define mem_l2cap_pending_item 0x43a6
  864. #define mem_l2cap_xmem_end 0x43a7
  865. #define mem_le_dsniff 0x43a7
  866. #define mem_le_conn_interval 0x43a9
  867. #define mem_le_scan_enable 0x43ab
  868. #define mem_le_scan_interval 0x43ac
  869. #define mem_le_scan_window 0x43ae
  870. #define mem_le_adv_led 0x43b0
  871. #define mem_le_adv_enable 0x43b1
  872. #define mem_le_adv_data_len 0x43b2
  873. #define mem_le_adv_data 0x43b3
  874. #define mem_le_scan_data_len 0x43d2
  875. #define mem_le_scan_data 0x43d3
  876. #define mem_le_interal_min 0x43f2
  877. #define mem_le_interal_max 0x43f4
  878. #define mem_le_latency 0x43f6
  879. #define mem_le_timeout 0x43f8
  880. #define mem_le_ch_mapped 0x43fa
  881. #define mem_le_new_map 0x43fb
  882. #define mem_le_new_param 0x4400
  883. #define mem_le_txheader 0x4409
  884. #define mem_le_txlen 0x440a
  885. #define mem_le_txpayload 0x440b
  886. #define mem_le_txcid 0x440d
  887. #define mem_le_l2cap 0x440f
  888. #define mem_le_l2cap_response 0x4410
  889. #define mem_le_txbdy 0x4411
  890. #define mem_le_pcnt_tx 0x4430
  891. #define mem_le_pcnt_rx 0x4435
  892. #define mem_le_last_mic 0x443a
  893. #define mem_le_ivm 0x443e
  894. #define mem_le_ivs 0x4442
  895. #define mem_le_ltk 0x4446
  896. #define mem_ltk_exists 0x4456
  897. #define mem_le_rconfirm 0x4457
  898. #define mem_le_srand 0x4467
  899. #define mem_le_iat 0x4477
  900. #define mem_le_rat 0x4478
  901. #define mem_le_preq 0x4479
  902. #define mem_le_preq_iocap 0x447a
  903. #define mem_le_preq_oob 0x447b
  904. #define mem_le_preq_auth 0x447c
  905. #define mem_le_preq_max_keysize 0x447d
  906. #define mem_le_preq_init_key_distribution 0x447e
  907. #define mem_le_preq_resp_key_distribution 0x447f
  908. #define mem_le_pres 0x4480
  909. #define mem_le_pres_iocap 0x4481
  910. #define mem_le_pres_oob 0x4482
  911. #define mem_le_pres_auth 0x4483
  912. #define mem_le_pres_max_keysize 0x4484
  913. #define mem_le_pres_init_key_distribution 0x4485
  914. #define mem_le_pres_resp_key_distribution 0x4486
  915. #define mem_le_pairing_state 0x4487
  916. #define mem_le_enc_state 0x4488
  917. #define mem_le_pairing_mode 0x4489
  918. #define mem_le_tk 0x448a
  919. #define mem_le_ediv 0x448e
  920. #define mem_le_rand 0x4490
  921. #define mem_le_irk 0x4498
  922. #define mem_le_fixed_passkey_flag 0x44a8
  923. #define mem_le_secure_connect_enable 0x44a9
  924. #define mem_le_secure_connect_flag 0x44aa
  925. #define mem_le_sc_calc 0x44ab
  926. #define mem_le_secure_connect_state 0x44ac
  927. #define mem_le_sc_confirm_gkey_flag 0x44ad
  928. #define mem_le_sc_local_key_invalid 0x44ae
  929. #define mem_le_pairing_handle 0x44af
  930. #define mem_le_search_handle_start 0x44b1
  931. #define mem_le_search_handle_end 0x44b3
  932. #define mem_le_att_offset 0x44b5
  933. #define mem_le_search_att_type_length 0x44b5
  934. #define mem_le_search_att_type 0x44b6
  935. #define mem_le_notify_handle 0x44c6
  936. #define mem_le_search_uuid_length 0x44c8
  937. #define mem_le_search_uuid 0x44c9
  938. #define mem_le_handle_data_len 0x44d9
  939. #define mem_le_handle_data 0x44da
  940. #define mem_le_adv_param 0x44ea
  941. #define mem_le_adv_interval_min 0x44ea
  942. #define mem_le_adv_interval_max 0x44ec
  943. #define mem_le_adv_type 0x44ee
  944. #define mem_le_adv_own_addr_type 0x44ef
  945. #define mem_le_adv_direct_addr_type 0x44f0
  946. #define mem_le_adv_direct_addr 0x44f1
  947. #define mem_le_adv_channel_map 0x44f7
  948. #define mem_le_adv_filter_policy 0x44f8
  949. #define mem_le_conn_param 0x44f9
  950. #define mem_le_conn_peer_addr_type 0x44f9
  951. #define mem_le_conn_peer_addr 0x44fa
  952. #define mem_le_conn_own_addr_type 0x4500
  953. #define mem_le_conn_interval_min 0x4501
  954. #define mem_le_conn_interval_max 0x4503
  955. #define mem_le_conn_latency 0x4505
  956. #define mem_le_conn_superto 0x4507
  957. #define mem_le_scan_params 0x4509
  958. #define mem_le_scan_type 0x4509
  959. #define mem_le_scan_own_addr_type 0x450a
  960. #define mem_le_scan_filter_policy 0x450b
  961. #define mem_le_lap 0x450c
  962. #define mem_le_uap 0x450f
  963. #define mem_le_nap 0x4510
  964. #define mem_le_xtype_fifo 0x4512
  965. #define mem_le_transmit_window 0x4517
  966. #define mem_le_connection_updata_param 0x451b
  967. #define mem_le_l2cap_size 0x452b
  968. #define mem_le_packet_len_recved 0x452d
  969. #define mem_le_tx_buff_used 0x452e
  970. #define mem_le_tx_ptr0 0x452f
  971. #define mem_le_tx_ptr1 0x4531
  972. #define mem_le_tx_ptr2 0x4533
  973. #define mem_le_tx_ptr3 0x4535
  974. #define mem_ui_le_uuid_table 0x4537
  975. #define mem_le_cur_attlist_start_ptr 0x4539
  976. #define mem_le_cur_handle_start 0x453b
  977. #define mem_le_cur_handle_end 0x453d
  978. #define mem_le_cur_uuid_lenth 0x453f
  979. #define mem_le_cur_uuid 0x4540
  980. #define mem_notify_handle_pool 0x4550
  981. #define mem_le_curr_att_len 0x4554
  982. #define mem_le_signaling_identifier 0x4555
  983. #define mem_le_more_data 0x4556
  984. #define mem_lmp_version 0x4557
  985. #define mem_lmp_subversion 0x455a
  986. #define mem_local_name_length 0x455c
  987. #define mem_local_name 0x455d
  988. #define mem_local_name2 0x4560
  989. #define mem_local_name_end 0x45a0
  990. #define mem_unsniff2sniff_timer 0x45a1
  991. #define mem_switch_flag 0x45a2
  992. #define mem_role_switch_flag 0x45a3
  993. #define mem_eeprom_ota_base_addr 0x45a4
  994. #define mem_rfc_xmem_start 0x45a6
  995. #define mem_pn_dlci 0x45a6
  996. #define mem_pn_max_frame_size 0x45a7
  997. #define memFCStemp1 0x45a9
  998. #define memFCStemp2 0x45aa
  999. #define memFCStemp3 0x45ab
  1000. #define mem_rfcomm_initiator 0x45ac
  1001. #define mem_remote_spp_channel 0x45ad
  1002. #define mem_HIUfcs_SPP 0x45ae
  1003. #define mem_HIUfcs_SPP_WCredits 0x45af
  1004. #define mem_remote_credits 0x45b0
  1005. #define mem_credit_given 0x45b2
  1006. #define mem_ms_channel 0x45b3
  1007. #define mem_current_packet_length 0x45b4
  1008. #define mem_profile_channel 0x45b6
  1009. #define mem_rfc_l2capch_ptr 0x45b7
  1010. #define mem_rfc_server_state 0x45b9
  1011. #define mem_rfc_xmem_end 0x45bb
  1012. #define mem_ui_uuid_table 0x45bb
  1013. #define mem_all_uuid_16bits 0x45bd
  1014. #define mem_all_uuid_128bits 0x45d3
  1015. #define mem_sdp_l2capch_ptr 0x45f5
  1016. #define mem_sp_local_key_invalid 0x45f7
  1017. #define mem_le_private_key_256 0x45f8
  1018. #define mem_le_pubkey_local_x_256 0x4618
  1019. #define mem_le_pubkey_local_y_256 0x4638
  1020. #define mem_sp_private_key 0x4658
  1021. #define mem_sp_pubkey_local 0x4670
  1022. #define mem_sp_pubkey_local_x 0x4670
  1023. #define mem_sp_pubkey_local_x_end 0x4688
  1024. #define mem_sp_pubkey_local_y 0x4688
  1025. #define mem_ssp_enable 0x46a0
  1026. #define mem_sp_iocap_local 0x46a1
  1027. #define mem_ssp_mode_flag 0x46a4
  1028. #define mem_spp_reject_justwork_flag 0x46a5
  1029. #define mem_sp_iocap_remote 0x46a6
  1030. #define mem_flag_mode_ssp_pin 0x46a9
  1031. #define mem_authentication_passkey_times 0x46aa
  1032. #define mem_passkey_1bit 0x46ab
  1033. #define mem_flag_pairing_state 0x46ac
  1034. #define mem_ipc_lock_bt 0x46ad
  1035. #define mem_ipc_lock_c51 0x46ae
  1036. #define mem_ipc_fifo_bt2c51 0x46af
  1037. #define mem_ipc_fifo_c512bt 0x46b4
  1038. #define mem_led_switch 0x46b9
  1039. #define mem_ui_button_timer 0x46ba
  1040. #define mem_ui_button_last_state 0x46bb
  1041. #define mem_ui_timer_last_btclk 0x46bc
  1042. #define memui_reconnect_mode 0x46c0
  1043. #define mem_ui_state_map 0x46c1
  1044. #define mem_ui_profile_supported 0x46c3
  1045. #define mem_led_gpio 0x46c4
  1046. #define mem_led_dark_time 0x46c5
  1047. #define mem_led_light_time 0x46c7
  1048. #define mem_ui_button_timeout 0x46c9
  1049. #define mem_ui_button_gpio 0x46ca
  1050. #define mem_pin_length 0x46cb
  1051. #define mem_pin 0x46cc
  1052. #define mem_uppersm_xmem_start 0x46dc
  1053. #define mem_major_uppersm 0x46dc
  1054. #define mem_sub_uppersm 0x46dd
  1055. #define mem_uppersm_list 0x46de
  1056. #define mem_uppersm_disl2capch_index 0x46e3
  1057. #define mem_uppersm_xmem_end 0x46e4
  1058. #define mem_tws_bdaddr 0x46e4
  1059. #define mem_tws_lap 0x46e4
  1060. #define mem_tws_uap 0x46e7
  1061. #define mem_tws_nap 0x46e8
  1062. #define mem_tws_state 0x46ea
  1063. #define mem_tws_freq 0x46eb
  1064. #define mem_tws_rcv_long_pck 0x46ec
  1065. #define mem_tws_pairing_timeout_count 0x46ed
  1066. #define mem_tws_pairing_timeout 0x46ef
  1067. #define mem_wait_connected_timeout_count 0x46f1
  1068. #define mem_wait_connected_timeout 0x46f3
  1069. #define mem_loss_match 0x46f5
  1070. #define mem_ack_interval 0x46f7
  1071. #define mem_ack_interval_count 0x46f8
  1072. #define mem_tws_temp 0x46f9
  1073. #define mem_tws_rx_type 0x46fa
  1074. #define mem_tws_am_addr 0x46fb
  1075. #define mem_tws_arq 0x46fc
  1076. #define mem_count_master_loss_link 0x46fd
  1077. #define mem_count_rcv_adv 0x46fe
  1078. #define mem_tws_adv_match 0x46ff
  1079. #define mem_tws_ack 0x4700
  1080. #define mem_tws_loss_ack 0x4701
  1081. #define mem_tws_count_poll 0x4702
  1082. #define mem_acl_credits 0x4704
  1083. #define mem_allow_switch 0x4706
  1084. #define mem_hci_acl_queue_start 0x4707
  1085. #define mem_hci_wake_clk 0x470b
  1086. #define mem_a2dp_uuid 0x4704
  1087. #define mem_nv_data 0x48f8
  1088. #define mem_nv_data0 0x48f8
  1089. #define mem_nv_data1 0x4910
  1090. #define mem_nv_data2 0x4928
  1091. #define mem_nv_data3 0x4940
  1092. #define mem_nv_data4 0x4958
  1093. #define mem_gpio3_curr_state 0x4970
  1094. #define mem_gpio3_state 0x4971
  1095. #define mem_gpio4_curr_state 0x4972
  1096. #define mem_gpio4_state 0x4973
  1097. #define mem_gpio5_curr_state 0x4974
  1098. #define mem_gpio5_state 0x4975
  1099. #define mem_le_att_list 0x4976
  1100. #define mem_usb_status 0x4704
  1101. #define mem_usb_fifo_empty 0x4705
  1102. #define mem_usb_read_len 0x4706
  1103. #define mem_usb_rxbuf 0x4707
  1104. #define mem_usb_state 0x4747
  1105. #define mem_bufptr 0x4748
  1106. #define mem_remain 0x474a
  1107. #define mem_devicedesc 0x474b
  1108. #define mem_hidreportdesc_kb 0x475f
  1109. #define mem_hidreportdesc_m 0x4827
  1110. #define mem_confdesc 0x48ef
  1111. #define mem_string0 0x4953
  1112. #define mem_string1 0x4958
  1113. #define mem_string2 0x4976
  1114. #define mem_string3 0x4994
  1115. #define mem_usb_setup 0x49b2
  1116. #define mem_usb_setup_bmRequestType 0x49b2
  1117. #define mem_usb_setup_bRequest 0x49b3
  1118. #define mem_usb_setup_bValue 0x49b4
  1119. #define mem_usb_setup_bValueH 0x49b5
  1120. #define mem_usb_setup_wIndex 0x49b6
  1121. #define mem_usb_setup_bLength 0x49b8
  1122. #define mem_usb_setup_bLengthH 0x49b9
  1123. #define mem_usb0_setup 0x49ba
  1124. #define mem_usb0_set_report_data 0x49fa
  1125. #define mem_usb0_get_report_data 0x4a3a
  1126. #define mem_usb_setup_bValue_temp 0x4a7a
  1127. #define mem_usb0_get_set_report 0x4a7c
  1128. #define mem_usb0_data_ready_report 0x4a7d
  1129. #define mem_usb_tx_win_enable 0x4a7e
  1130. #define mem_usb_tx_mac_enable 0x4a7f
  1131. #define mem_usb_zero_packet 0x4a80
  1132. #define mem_usb_ones_packet 0x4a82
  1133. #define mem_usb_two_packet 0x4a84
  1134. #define mem_usb_idle_flag 0x4a86
  1135. #define mem_usb_idle_rate 0x4a87
  1136. #define mem_usb_get_protocol_flag 0x4a88
  1137. #define mem_usb_set_protocol_status 0x4a89
  1138. #define mem_usb_set_protocol_value 0x4a8a
  1139. #define mem_usb0_state 0x4a8b
  1140. #define mem_usb_remote_wakeup 0x4a8c
  1141. #define mem_usb_clear_remote_wakeup 0x4a8d
  1142. #define mem_usb_ep0_stall_status 0x4a8e
  1143. #define mem_usb_ep1_stall_status 0x4a8f
  1144. #define mem_usb_ep2_stall_status 0x4a90
  1145. #define mem_usb_ep3_stall_status 0x4a91
  1146. #define mem_dsc_info_data_pointer 0x4a92
  1147. #define mem_dsc_info_len 0x4a94
  1148. #define mem_usb_ep1_data 0x4a95
  1149. #define mem_usb_ep2_data 0x4a96
  1150. #define mem_usb_tx_enable 0x4a97
  1151. #define mem_usb_tx_wait 0x4a98
  1152. #define mem_usb_device_enumeration_endflag 0x4a99
  1153. #define mem_usb_wakestate_onetime_flag 0x4a9a
  1154. #define mem_usb_mac_wakeup_trig 0x4a9b
  1155. #define mem_usb_set_high_addr_flag 0x4a9c
  1156. #define mem_usb_clear_halt 0x4a9d
  1157. #define mem_usb_mouse_data 0x4a9e
  1158. #define mem_usb_kb_data 0x4aae
  1159. #define mem_usb_kb_multikey 0x4abe
  1160. #define mem_usb_test_cnt 0x4ace
  1161. #define mem_usb_test_kb 0x4acf
  1162. #define mem_24g_rxbuf 0x4ad0
  1163. #define mem_24g_rxdata 0x4af4
  1164. #define mem_24g_rxdata_length 0x4b18
  1165. #define mem_24g_rx_crc 0x4b19
  1166. #define mem_24g_rx_crc_cal 0x4b1b
  1167. #define mem_24g_crc 0x4b1d
  1168. #define mem_24g_pid 0x4b1f
  1169. #define mem_24g_datalen 0x4b20
  1170. #define mem_24g_data_type 0x4b21
  1171. #define mem_24g_txdata 0x4b22
  1172. #define mem_24g_txlen 0x4b42
  1173. #define mem_24g_txpayload 0x4b43
  1174. #define mem_24g_rx_window 0x4b6e
  1175. #define mem_24g_ensure 0x4b70
  1176. #define mem_24g_txfail_cnt 0x4b71
  1177. #define mem_24g_get_ack_fail 0x4b72
  1178. #define mem_24g_fast_tx 0x4b73
  1179. #define mem_24g_fast_hop 0x4b74
  1180. #define mem_24g_exit_flag 0x4b75
  1181. #define mem_24g_tx_flag 0x4b76
  1182. #define mem_24g_retry 0x4b77
  1183. #define mem_24g_ch 0x4b78
  1184. #define mem_24g_current_ch_number 0x4b79
  1185. #define mem_24g_ch_map1 0x4b7a
  1186. #define mem_24g_ch_map2 0x4b7e
  1187. #define mem_24g_ch_map3 0x4b82
  1188. #define mem_24g_ch_map4 0x4b86
  1189. #define mem_24g_tx_btclk 0x4b8a
  1190. #define mem_24g_interval 0x4b8e
  1191. #define mem_24g_interval_min 0x4b8f
  1192. #define mem_24g_interval_max 0x4b90
  1193. #define mem_24g_addr_length 0x4b91
  1194. #define mem_24g_addr 0x4b92
  1195. #define mem_24g_paring_addr 0x4b98
  1196. #define mem_24g_pairing_flag 0x4b9e
  1197. #define mem_24g_pairing_timer_flag 0x4b9f
  1198. #define mem_24g_pairing_sm 0x4ba0
  1199. #define mem_24g_enter_lpm_timer 0x4ba1
  1200. #define mem_24g_enter_hibernate_flag 0x4ba2
  1201. #define mem_24g_enter_hibernate 0x4ba3
  1202. #define mem_24g_abort_flag 0x4bab
  1203. #define mem_24g_data_pid 0x4bac
  1204. #define mem_24g_common_temp 0x4bad
  1205. #define mem_24g_payload_rxbuf 0x4bcd
  1206. #define mem_24g_pac_len 0x4bed
  1207. #define mem_queue_ele_num 0x4bee
  1208. #define mem_queue_read 0x4bef
  1209. #define mem_queue_write 0x4bf1
  1210. #define mem_queue_start 0x4bf3
  1211. #define mem_data_ele0 0x4bf3
  1212. #define mem_data_ele1 0x4c13
  1213. #define mem_data_ele2 0x4c33
  1214. #define mem_queue_end 0x4c53
  1215. #define mem_queue_temp 0x4c53
  1216. #define mem_24g_check_dongle_times 0x4c55
  1217. #define mem_24g_rxdata_temp 0x4c57
  1218. #define mem_24g_dongle_private_addr 0x4c7b
  1219. #define mem_dongle_mode_init 0x4c81
  1220. #define mem_dongle_work_mode 0x4c82
  1221. #define mem_dongle_ms_bind_step 0x4c83
  1222. #define mem_dongle_kb_bind_step 0x4c84
  1223. #define mem_dongle_bind_device_status 0x4c85
  1224. #define mem_24g_bind_rf_data 0x4c86
  1225. #define mem_24g_bind_payload 0x4c96
  1226. #define mem_24g_abort_packet 0x4c9d
  1227. #define mem_24g_rf_laststa 0x4c9e
  1228. #define mem_24g_rf_receive 0x4c9f
  1229. #define mem_24g_rx_interrupt 0x4ca0
  1230. #define mem_dongle_tx_btclk 0x4ca1
  1231. #define mem_dongle_interval 0x4ca5
  1232. #define mem_rssi_noise_buf 0x4ca6
  1233. #define mem_rssi_signal_buf 0x4cc6
  1234. #define mem_rssi_noise_avg 0x4ce6
  1235. #define mem_rssi_signal_avg 0x4ce7
  1236. #define mem_rssi_snr_opposite 0x4ce8
  1237. #define mem_rssi_noise_buf_index 0x4ce9
  1238. #define mem_rssi_signal_buf_index 0x4cea
  1239. #define mem_24g_get_user_defined_flag 0x4ceb
  1240. #define mem_24g_get_user_defined_data 0x4cec
  1241. #define mem_wake_flag 0x4704
  1242. #define mem_qspi_gpio_ncs 0x4705
  1243. #define mem_qspi_gpio_sck 0x4706
  1244. #define mem_qspi_gpio_io0 0x4707
  1245. #define mem_qspi_gpio_io1 0x4708
  1246. #define mem_qspi_gpio_io2 0x4709
  1247. #define mem_qspi_gpio_io3 0x470a
  1248. #define mem_flash_start_addr 0x470b
  1249. #define mem_m0_lpm_flag 0x470e
  1250. #define mem_xlmp_conn_state 0x4710
  1251. #define mem_save_state 0x4711
  1252. #define mem_lock_qspi 0x4712
  1253. #define mem_remote_mtu_size 0x4713
  1254. #define mem_local_mtu_size 0x4715
  1255. #define mem_mtu_size 0x4717
  1256. #define mem_75delay_timer 0x4719
  1257. #define mem_connection_param_interval 0x471a
  1258. #define mem_time_wake_gap 0x471c
  1259. #define mem_hibernate_flag 0x471e
  1260. #define mem_watchdog_enable 0x471f
  1261. #define mem_remote_rx_max_octets 0x4720
  1262. #define mem_remote_rx_max_time 0x4722
  1263. #define mem_remote_tx_max_octets 0x4724
  1264. #define mem_remote_tx_max_time 0x4726
  1265. #define mem_local_rx_max_octets 0x4728
  1266. #define mem_local_rx_max_time 0x472a
  1267. #define mem_local_tx_max_octets 0x472c
  1268. #define mem_local_tx_max_time 0x472e
  1269. #define mem_le_txheader_temp 0x4730
  1270. #define mem_le_txlen_temp 0x4731
  1271. #define mem_alloc_block 0x4732
  1272. #define mem_alloc_header 0x4732
  1273. #define mem_alloc_rptr 0x4734
  1274. #define mem_alloc_wptr 0x4736
  1275. #define mem_alloc_end 0x4738
  1276. #define mem_alloc_cur_len 0x473a
  1277. #define mem_alloc_block_start 0x473b
  1278. #define mem_lcp_block 0x474a
  1279. #define mem_lcp_header 0x474a
  1280. #define mem_lcp_rptr 0x474c
  1281. #define mem_lcp_wptr 0x474e
  1282. #define mem_lcp_end 0x4750
  1283. #define mem_lcp_cur_len 0x4752
  1284. #define mem_lcp_block_start 0x4753
  1285. #define mem_l2cap_rx_max_lenth 0x4762
  1286. #define mem_l2cap_rx_malloc_num 0x4764
  1287. #define mem_nv_le_data 0x4765
  1288. #define mem_nv_le_data0 0x4765
  1289. #define mem_nv_le_data1 0x477d
  1290. #define mem_nv_le_data2 0x4795
  1291. #define mem_nv_le_data3 0x47ad
  1292. #define mem_nv_le_data4 0x47c5
  1293. #define mem_le_att_rf 0x47dd
  1294. #define mem_rc_att_list 0x47fb
  1295. #define mem_rc_att_list_end 0x4b7f
  1296. #define mem_le_adv_chanel 0x4b7f
  1297. #define mem_le_scan_chanel 0x4b80
  1298. #define mem_ipc_adv_data_len 0x4b81
  1299. #define mem_ipc_adv_data 0x4b82
  1300. #define mem_ipc_scan_rsp_data_len 0x4bd2
  1301. #define mem_ipc_scan_rsp_data 0x4bd3
  1302. #define mem_otp_data_buf 0x4c23
  1303. #define mem_spp_uuid_list 0x4c43
  1304. #define mem_spp_uuid_list_end 0x4e37
  1305. #define mem_ipc_tx_buf 0x4e37
  1306. #define mem_ipc_tx_buf_end 0x4eff
  1307. #define mem_spp_send_buf 0x4eff
  1308. #define mem_spp_send_buf_end 0x4fc7
  1309. #define mem_nec_gpio 0x4fc7
  1310. #define mem_nec_receive_enable 0x4fc8
  1311. #define mem_nec_data_flag 0x4fc9
  1312. #define mem_nec_data_buf 0x4fca
  1313. #define mem_nec_data_buf_end 0x4fee
  1314. #define mem_nec_error_packet 0x4fee
  1315. #define mem_mcmd 0xff0
  1316. #define mem_mouse_data 0xff1
  1317. #define L2CAP_ONE_RXBUFF_LENTH 0x200
  1318. #define mem_l2cap_rxbuff1 0x1000
  1319. #define mem_l2cap_rxbuff2 0x1400
  1320. #define mem_tx_buff0 0x1800
  1321. #define mem_tx_buff1 0x1880
  1322. #define mem_tx_buff2 0x1900
  1323. #define mem_tx_buff3 0x1980
  1324. #define mem_tx_buff4 0x1a00
  1325. #define mem_tx_buff5 0x1a80
  1326. #define mem_tx_buff6 0x1b00
  1327. #define mem_tx_buff7 0x1b80
  1328. #define mem_le_tx_buffer0 0x1c00
  1329. #define mem_le_tx_buffer1 0x1c80
  1330. #define mem_le_tx_buffer2 0x1d00
  1331. #define mem_le_tx_buffer3 0x1d80
  1332. #define mem_h5rx_buf 0x1e00
  1333. #define mem_h5rx_buf_end 0x1eff
  1334. #define mem_h5tx_buf 0x1f00
  1335. #define mem_h5tx_buf_end 0x1fff
  1336. #define mmem_qspi_tbuf 0x10000
  1337. #define IPC_MEM_BLOCK_START 0x10000
  1338. #define IPC_TO_BT_BUF_START_ADDR 0x10000
  1339. #define IPC_TO_BT_BUF_END_ADDR 0x10300
  1340. #define IPC_TO_BT_WPTR_ADDR 0x10300
  1341. #define IPC_TO_BT_RPTR_ADDR 0x10304
  1342. #define IPC_TO_M0_WPTR_ADDR 0x10308
  1343. #define IPC_TO_M0_RPTR_ADDR 0x1030c
  1344. #define IPC_TO_M0_BUF_START_ADDR 0x10350
  1345. #define IPC_TO_M0_BUF_END_ADDR 0x10500
  1346. #define IPC_MEM_ELOCK_END 0x10500
  1347. #define DEBUG_LOG_MEM_BLOCK_START 0x10310
  1348. #define DEBUG_LOG_INITIAL_FLAG_ADDR 0x10310
  1349. #define DEBUG_LOG_LOCK_FLAG_CM0_ADDR 0x10311
  1350. #define DEBUG_LOG_LOCK_FLAG_RESPIN_ADDR 0x10312
  1351. #define DEBUG_LOG_LOCK_VICTIM_ADDR 0x10313
  1352. #define DEBUG_LOG_READ_INDEX_ADDR 0x10314
  1353. #define DEBUG_LOG_WRITE_INDEX_ADDR 0x10316
  1354. #define DEBUG_LOG_BUFFER_START_ADDR 0x10318
  1355. #define DEBUG_LOG_BUFFER_END_ADDR 0x10350
  1356. #define DEBUG_LOG_MEM_BLOCK_END 0x10350
  1357. #define DEBUG_LOG_INITIAL_SUCCESS_FLAG 0x5f
  1358. #define DEBUG_LOG_LOCK_VICTIM_CM0 0x35
  1359. #define DEBUG_LOG_LOCK_VICTIM_RESPIN 0x53
  1360. #define DEBUG_LOG_BUFFER_CNT 0x0E
  1361. #define IPC_TYPE_CMD 0x01
  1362. #define IPC_TYPE_EVT 0x02
  1363. #define IPC_TYPE_HID 0x03
  1364. #define IPC_TYPE_SPP 0x04
  1365. #define IPC_TYPE_BLE 0x05
  1366. #define IPC_TYPE_24G 0x06
  1367. #define IPC_TYPE_MESH 0x07
  1368. #define IPC_TYPE_ADV 0x08
  1369. #define IPC_TYPE_SCAN 0x09
  1370. #define IPC_TYPE_A2DP 0x0a
  1371. #define IPC_TYPE_HFP 0x0b
  1372. #define IPC_TYPE_NEC 0x0c
  1373. #endif