sccb.c 7.8 KB

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  1. /*
  2. * This file is part of the OpenMV project.
  3. * Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
  4. * This work is licensed under the MIT license, see the file LICENSE for details.
  5. *
  6. * SCCB (I2C like) driver.
  7. *
  8. */
  9. #include <stdbool.h>
  10. #include <freertos/FreeRTOS.h>
  11. #include <freertos/task.h>
  12. #include "sccb.h"
  13. #include <stdio.h>
  14. #include "sdkconfig.h"
  15. #if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
  16. #include "esp32-hal-log.h"
  17. #else
  18. #include "esp_log.h"
  19. static const char* TAG = "sccb";
  20. #endif
  21. #define LITTLETOBIG(x) ((x<<8)|(x>>8))
  22. #ifdef CONFIG_SCCB_HARDWARE_I2C
  23. #include "driver/i2c.h"
  24. #define SCCB_FREQ 200000 /*!< I2C master frequency*/
  25. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  26. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  27. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  28. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  29. #define ACK_VAL 0x0 /*!< I2C ack value */
  30. #define NACK_VAL 0x1 /*!< I2C nack value */
  31. const int SCCB_I2C_PORT = 1;
  32. static uint8_t ESP_SLAVE_ADDR = 0x3c;
  33. #else
  34. #include "twi.h"
  35. #endif
  36. int SCCB_Init(int pin_sda, int pin_scl)
  37. {
  38. ESP_LOGI(TAG, "pin_sda %d pin_scl %d\n", pin_sda, pin_scl);
  39. #ifdef CONFIG_SCCB_HARDWARE_I2C
  40. //log_i("SCCB_Init start");
  41. i2c_config_t conf;
  42. conf.mode = I2C_MODE_MASTER;
  43. conf.sda_io_num = pin_sda;
  44. conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
  45. conf.scl_io_num = pin_scl;
  46. conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
  47. conf.master.clk_speed = SCCB_FREQ;
  48. i2c_param_config(SCCB_I2C_PORT, &conf);
  49. i2c_driver_install(SCCB_I2C_PORT, conf.mode, 0, 0, 0);
  50. #else
  51. twi_init(pin_sda, pin_scl);
  52. #endif
  53. return 0;
  54. }
  55. uint8_t SCCB_Probe()
  56. {
  57. #ifdef CONFIG_SCCB_HARDWARE_I2C
  58. uint8_t slave_addr = 0x0;
  59. while(slave_addr < 0x7f) {
  60. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  61. i2c_master_start(cmd);
  62. i2c_master_write_byte(cmd, ( slave_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
  63. i2c_master_stop(cmd);
  64. esp_err_t ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  65. i2c_cmd_link_delete(cmd);
  66. if( ret == ESP_OK) {
  67. ESP_SLAVE_ADDR = slave_addr;
  68. return ESP_SLAVE_ADDR;
  69. }
  70. slave_addr++;
  71. }
  72. return ESP_SLAVE_ADDR;
  73. #else
  74. uint8_t reg = 0x00;
  75. uint8_t slv_addr = 0x00;
  76. ESP_LOGI(TAG, "SCCB_Probe start");
  77. for (uint8_t i = 0; i < 127; i++) {
  78. if (twi_writeTo(i, &reg, 1, true) == 0) {
  79. slv_addr = i;
  80. break;
  81. }
  82. if (i!=126) {
  83. vTaskDelay(10 / portTICK_PERIOD_MS); // Necessary for OV7725 camera (not for OV2640).
  84. }
  85. }
  86. return slv_addr;
  87. #endif
  88. }
  89. uint8_t SCCB_Read(uint8_t slv_addr, uint8_t reg)
  90. {
  91. #ifdef CONFIG_SCCB_HARDWARE_I2C
  92. uint8_t data=0;
  93. esp_err_t ret = ESP_FAIL;
  94. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  95. i2c_master_start(cmd);
  96. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN);
  97. i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
  98. i2c_master_stop(cmd);
  99. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  100. i2c_cmd_link_delete(cmd);
  101. if(ret != ESP_OK) return -1;
  102. cmd = i2c_cmd_link_create();
  103. i2c_master_start(cmd);
  104. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  105. i2c_master_read_byte(cmd, &data, NACK_VAL);
  106. i2c_master_stop(cmd);
  107. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  108. i2c_cmd_link_delete(cmd);
  109. if(ret != ESP_OK) {
  110. ESP_LOGE(TAG, "SCCB_Read Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", ESP_SLAVE_ADDR, reg, data, ret);
  111. }
  112. return data;
  113. #else
  114. uint8_t data=0;
  115. int rc = twi_writeTo(slv_addr, &reg, 1, true);
  116. if (rc != 0) {
  117. data = 0xff;
  118. } else {
  119. rc = twi_readFrom(slv_addr, &data, 1, true);
  120. if (rc != 0) {
  121. data=0xFF;
  122. }
  123. }
  124. if (rc != 0) {
  125. ESP_LOGE(TAG, "SCCB_Read [%02x] failed rc=%d\n", reg, rc);
  126. }
  127. return data;
  128. #endif
  129. }
  130. uint8_t SCCB_Write(uint8_t slv_addr, uint8_t reg, uint8_t data)
  131. {
  132. #ifdef CONFIG_SCCB_HARDWARE_I2C
  133. esp_err_t ret = ESP_FAIL;
  134. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  135. i2c_master_start(cmd);
  136. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN);
  137. i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
  138. i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
  139. i2c_master_stop(cmd);
  140. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  141. i2c_cmd_link_delete(cmd);
  142. if(ret != ESP_OK) {
  143. ESP_LOGE(TAG, "SCCB_Write Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", ESP_SLAVE_ADDR, reg, data, ret);
  144. }
  145. return ret == ESP_OK ? 0 : -1;
  146. #else
  147. uint8_t ret=0;
  148. uint8_t buf[] = {reg, data};
  149. if(twi_writeTo(slv_addr, buf, 2, true) != 0) {
  150. ret=0xFF;
  151. }
  152. if (ret != 0) {
  153. ESP_LOGE(TAG, "SCCB_Write [%02x]=%02x failed\n", reg, data);
  154. }
  155. return ret;
  156. #endif
  157. }
  158. uint8_t SCCB_Read16(uint8_t slv_addr, uint16_t reg)
  159. {
  160. #ifdef CONFIG_SCCB_HARDWARE_I2C
  161. uint8_t data=0;
  162. esp_err_t ret = ESP_FAIL;
  163. uint16_t reg_htons = LITTLETOBIG(reg);
  164. uint8_t *reg_u8 = (uint8_t *)&reg_htons;
  165. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  166. i2c_master_start(cmd);
  167. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN);
  168. i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
  169. i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
  170. i2c_master_stop(cmd);
  171. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  172. i2c_cmd_link_delete(cmd);
  173. if(ret != ESP_OK) return -1;
  174. cmd = i2c_cmd_link_create();
  175. i2c_master_start(cmd);
  176. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  177. i2c_master_read_byte(cmd, &data, NACK_VAL);
  178. i2c_master_stop(cmd);
  179. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  180. i2c_cmd_link_delete(cmd);
  181. if(ret != ESP_OK) {
  182. ESP_LOGE(TAG, "W [%04x]=%02x fail\n", reg, data);
  183. }
  184. return data;
  185. #else
  186. uint8_t data=0;
  187. uint16_t reg_htons = LITTLETOBIG(reg);
  188. uint8_t *reg_u8 = (uint8_t *)&reg_htons;
  189. uint8_t buf[] = {reg_u8[0], reg_u8[1]};
  190. int rc = twi_writeTo(slv_addr, buf, 2, true);
  191. if (rc != 0) {
  192. data = 0xff;
  193. } else {
  194. rc = twi_readFrom(slv_addr, &data, 1, true);
  195. if (rc != 0) {
  196. data=0xFF;
  197. }
  198. }
  199. if (rc != 0) {
  200. ESP_LOGE(TAG, "R [%04x] fail rc=%d\n", reg, rc);
  201. }
  202. return data;
  203. #endif
  204. }
  205. uint8_t SCCB_Write16(uint8_t slv_addr, uint16_t reg, uint8_t data)
  206. {
  207. static uint16_t i = 0;
  208. #ifdef CONFIG_SCCB_HARDWARE_I2C
  209. esp_err_t ret = ESP_FAIL;
  210. uint16_t reg_htons = LITTLETOBIG(reg);
  211. uint8_t *reg_u8 = (uint8_t *)&reg_htons;
  212. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  213. i2c_master_start(cmd);
  214. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN);
  215. i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
  216. i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
  217. i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
  218. i2c_master_stop(cmd);
  219. ret = i2c_master_cmd_begin(SCCB_I2C_PORT, cmd, 1000 / portTICK_RATE_MS);
  220. i2c_cmd_link_delete(cmd);
  221. if(ret != ESP_OK) {
  222. ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
  223. }
  224. return ret == ESP_OK ? 0 : -1;
  225. #else
  226. uint8_t ret=0;
  227. uint16_t reg_htons = LITTLETOBIG(reg);
  228. uint8_t *reg_u8 = (uint8_t *)&reg_htons;
  229. uint8_t buf[] = {reg_u8[0], reg_u8[1], data};
  230. if(twi_writeTo(slv_addr, buf, 3, true) != 0) {
  231. ret = 0xFF;
  232. }
  233. if (ret != 0) {
  234. ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
  235. }
  236. return ret;
  237. #endif
  238. }