ota-boot.xcl 6.3 KB

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  1. /**************************************************************************************************
  2. Filename: ota-boot.xcl
  3. Revised: $Date: 2009-08-13 10:21:20 -0700 (Thu, 13 Aug 2009) $
  4. Revision: $Revision: 20561 $
  5. Description: This is a linker command line file for the IAR XLINK tool for the
  6. CC2530 SoC. This mapping is to build boot code for applications
  7. written for OTA.
  8. Copyright 2010 Texas Instruments Incorporated. All rights reserved.
  9. IMPORTANT: Your use of this Software is limited to those specific rights
  10. granted under the terms of a software license agreement between the user
  11. who downloaded the software, his/her employer (which must be your employer)
  12. and Texas Instruments Incorporated (the "License"). You may not use this
  13. Software unless you agree to abide by the terms of the License. The License
  14. limits your use, and you acknowledge, that the Software may not be modified,
  15. copied or distributed unless embedded on a Texas Instruments microcontroller
  16. or used solely and exclusively in conjunction with a Texas Instruments radio
  17. frequency transceiver, which is integrated into your product. Other than for
  18. the foregoing purpose, you may not use, reproduce, copy, prepare derivative
  19. works of, modify, distribute, perform, display or sell this Software and/or
  20. its documentation for any purpose.
  21. YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE
  22. PROVIDED “AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
  23. INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE,
  24. NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
  25. TEXAS INSTRUMENTS OR ITS LICENSORS BE LIABLE OR OBLIGATED UNDER CONTRACT,
  26. NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER
  27. LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  28. INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE
  29. OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT
  30. OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  31. (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
  32. Should you have any questions regarding your right to use this Software,
  33. contact Texas Instruments Incorporated at www.TI.com.
  34. **************************************************************************************************/
  35. ////////////////////////////////////////////////////////////////////////////////
  36. //
  37. //
  38. // Segment limits
  39. // --------------
  40. //
  41. //
  42. // XDATA available to the program.
  43. //
  44. // Reserving address 0x0 for NULL.
  45. -D_XDATA_START=0x0001
  46. -D_XDATA_END=0x1EFF
  47. //
  48. //
  49. // The 8052 IDATA is overlayed on the SoC XDATA space from 0x1F00-0x1FFF.
  50. //
  51. -D_IDATA_END=0xFF // Last address of Idata memory.
  52. //
  53. //
  54. // CODE
  55. //
  56. -D_CODE_START=0x0000
  57. -D_CODE_END=0x07FF
  58. //
  59. //
  60. //
  61. // Special SFRs
  62. // ------------
  63. //
  64. // Register bank setup
  65. //
  66. -D?REGISTER_BANK=0 // Default register bank (0,1,2,3).
  67. -D_REGISTER_BANK_START=0 // Start address for default register bank (00,08,10,18).
  68. //
  69. //
  70. // PDATA page setup
  71. //
  72. -D?PBANK_NUMBER=00 // High byte of 16-bit address to the PDATA area.
  73. //
  74. //
  75. // Virtual register setup
  76. // ----------------------
  77. //
  78. -D_BREG_START=0x00 // The bit address where the BREG segments starts.
  79. // Must be placed on: _BREG_START%8=0 where _BREG_START <= 0x78.
  80. -D?VB=0x20 // ?VB is used when referencing BREG as whole byte.
  81. // Must be placed on: ?VB=0x20+_BREG_START/8.
  82. //
  83. ////////////////////////////////////////////////////////////////////////////////
  84. ////////////////////////////////////////////////////////////////////////////////
  85. //
  86. // IDATA memory
  87. //
  88. // Setup "bit" segments (only for '__no_init bool' variables).
  89. -Z(BIT)BREG=_BREG_START
  90. -Z(BIT)BIT_N=0-7F
  91. -Z(DATA)REGISTERS+8=_REGISTER_BANK_START
  92. -Z(DATA)BDATA_Z,BDATA_N,BDATA_I=20-2F
  93. -Z(DATA)VREG+_NR_OF_VIRTUAL_REGISTERS=08-7F
  94. -Z(DATA)PSP,XSP=08-7F
  95. -Z(DATA)DOVERLAY=08-7F
  96. -Z(DATA)DATA_I,DATA_Z,DATA_N=08-7F
  97. -U(IDATA)0-7F=(DATA)0-7F
  98. -Z(IDATA)IDATA_I,IDATA_Z,IDATA_N=08-_IDATA_END
  99. -Z(IDATA)ISTACK+_IDATA_STACK_SIZE#08-_IDATA_END
  100. -Z(IDATA)IOVERLAY=08-FF
  101. ////////////////////////////////////////////////////////////////////////////////
  102. //
  103. // ROM memory
  104. //
  105. //
  106. // The following segments *must* be placed in the root bank. The order of
  107. // placement also matters for these segments, which is why we use the -Z
  108. // placement directive.
  109. //
  110. -Z(CODE)INTVEC=_CODE_START
  111. -Z(CODE)BIT_ID,BDATA_ID,DATA_ID,IDATA_ID,IXDATA_ID,PDATA_ID,XDATA_ID=_CODE_START-_CODE_END
  112. -Z(CODE)RAM_CODE_FLASH=_RAM_CODE_FLASH_START-_RAM_CODE_FLASH_END
  113. //
  114. //
  115. // The following segments *must* be placed in the root bank, but the order
  116. // of placement within the root bank is not important, which is why we use the
  117. // -P directive here.
  118. //
  119. -P(CODE)CSTART,BANK_RELAYS,RCODE,DIFUNCT,NEAR_CODE=_CODE_START-_CODE_END
  120. ////////////////////////////////////////////////////////////////////////////////
  121. //
  122. // XDATA memory
  123. //
  124. -Z(XDATA)XSTACK+_XDATA_STACK_SIZE=_XDATA_START-_XDATA_END
  125. -Z(XDATA)XDATA_Z,XDATA_I=_XDATA_START-_XDATA_END
  126. -P(XDATA)XDATA_N=_XDATA_START-_XDATA_END
  127. -cx51
  128. ////////////////////////////////////////////////////////////////////////////////
  129. //
  130. // Texas Instruments device specific
  131. // =================================
  132. //
  133. //
  134. // Include these two lines when generating a .hex file for banked code model:
  135. //-M(CODE)[(_CODEBANK_START+_FIRST_BANK_ADDR)-(_CODEBANK_END+_FIRST_BANK_ADDR)]*\
  136. //_NR_OF_BANKS+_FIRST_BANK_ADDR=0x8000
  137. //
  138. //
  139. // Any code that will be run from RAM by setting XMAP of MEMCTL must have the same bank-relative
  140. // address as the address in RAM to which the CODE will be copied to run.
  141. // Thus, any part of the first 8k of any bank can be dedicated to code that will run from RAM as
  142. // long as the corresponding relative address range is reserved in RAM by RAM_CODE_XDATA.
  143. //
  144. -D_RAM_CODE_XDATA_START=0x07E3
  145. -D_RAM_CODE_XDATA_END=(_RAM_CODE_XDATA_START+0x1C)
  146. -Z(XDATA)RAM_CODE_XDATA=_RAM_CODE_XDATA_START-_RAM_CODE_XDATA_END
  147. //
  148. -D_RAM_CODE_FLASH_START=0x07E3
  149. -D_RAM_CODE_FLASH_END=(_RAM_CODE_FLASH_START+0x1C)
  150. //
  151. // Fill code gaps with 0xFFFF so that the .hex image produced is full.
  152. -HFFFF
  153. //
  154. ////////////////////////////////////////////////////////////////////////////////